linux-kernel - [PATCH v2 0/8] soc: qcom: Add uart console support for SM4450

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <20230915021509.25773-1-quic_tengfan@quicinc.com>
Date:   Fri, 15 Sep 2023 10:15:00 +0800
From:   Tengfei Fan <quic_tengfan@...cinc.com>
To:     <will@...nel.org>, <robin.murphy@....com>, <joro@...tes.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <catalin.marinas@....com>
CC:     <geert+renesas@...der.be>, <arnd@...db.de>,
        <neil.armstrong@...aro.org>, <nfraprado@...labora.com>,
        <rafal@...ecki.pl>, <peng.fan@....com>,
        <linux-arm-kernel@...ts.infradead.org>, <iommu@...ts.linux.dev>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-msm@...r.kernel.org>, <quic_tsoni@...cinc.com>,
        <quic_shashim@...cinc.com>, <quic_kaushalk@...cinc.com>,
        <quic_tdas@...cinc.com>, <quic_tingweiz@...cinc.com>,
        <quic_aiquny@...cinc.com>, <kernel@...cinc.com>,
        Tengfei Fan <quic_tengfan@...cinc.com>
Subject: [PATCH v2 0/8] soc: qcom: Add uart console support for SM4450

This series add base description of UART, TLMM, interconnect, TCSRCC
RPMHCC, GCC, RPMh PD and SMMU nodes which helps SM4450 boot to shell
with console on boards with this SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
---
This patch series depends on below patch series:
"[PATCH v2 0/4] clk: qcom: Add support for GCC and RPMHCC on SM4450"
https://lore.kernel.org/linux-arm-msm/20230909123431.1725728-1-quic_ajipan@quicinc.com/
"[PATCH v2 0/2] pinctl: qcom: Add SM4450 pinctrl driver"
https://lore.kernel.org/linux-arm-msm/20230915015808.18296-1-quic_tengfan@quicinc.com/
"[PATCH v2 0/2] interconnect: qcom: Add SM4450 interconnect"
https://lore.kernel.org/linux-arm-msm/20230915020129.19611-1-quic_tengfan@quicinc.com/

v1 -> v2:
  - setting "qcom,rpmh-rsc" compatible to the first property
  - keep order by unit address
  - move tlmm node into soc node
  - update arm,smmu.yaml
  - add enable pinctrl and interconnect defconfig patches
  - remove blank line
  - redo dtbs_check check

previous discussion here:
[1]
https://lore.kernel.org/linux-arm-msm/20230908065847.28382-1-quic_tengfan@quicinc.com

Ajit Pandey (2):
  arm64: dts: qcom: sm4450: Add apps_rsc and cmd_db node
  arm64: dts: qcom: sm4450: Add RPMH and Global clock controller

Tengfei Fan (6):
  dt-bindings: firmware: document Qualcomm SM4450 SCM
  dt-bindings: mfd: qcom,tcsr: Add compatible for sm4450
  dt-bindings: interrupt-controller: qcom,pdc: document qcom,sm4450-pdc
  dt-bindings: arm-smmu: Add compatible for SM4450 SoC
  arm64: dts: qcom: add uart console support for SM4450
  arm64: defconfig: enable interconnect and pinctrl for SM4450

 .../bindings/firmware/qcom,scm.yaml           |   3 +
 .../interrupt-controller/qcom,pdc.yaml        |   1 +
 .../devicetree/bindings/iommu/arm,smmu.yaml   |   3 +
 .../devicetree/bindings/mfd/qcom,tcsr.yaml    |   1 +
 arch/arm64/boot/dts/qcom/sm4450-qrd.dts       |  18 +-
 arch/arm64/boot/dts/qcom/sm4450.dtsi          | 309 ++++++++++++++++++
 arch/arm64/configs/defconfig                  |   2 +
 7 files changed, 335 insertions(+), 2 deletions(-)


base-commit: 98897dc735cf6635f0966f76eb0108354168fb15
-- 
2.17.1