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Message-ID: <20230916-ab31c90dd56c99d36d5fce6c@orel>
Date: Sat, 16 Sep 2023 08:45:51 +0200
From: Andrew Jones <ajones@...tanamicro.com>
To: Evan Green <evan@...osinc.com>
Cc: Palmer Dabbelt <palmer@...osinc.com>,
David Laight <David.Laight@...lab.com>,
Jisheng Zhang <jszhang@...nel.org>,
Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <apatel@...tanamicro.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Greentime Hu <greentime.hu@...ive.com>,
Heiko Stuebner <heiko@...ech.de>,
Ley Foon Tan <leyfoon.tan@...rfivetech.com>,
Marc Zyngier <maz@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Sunil V L <sunilvl@...tanamicro.com>,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH] RISC-V: Probe misaligned access speed in parallel
On Fri, Sep 15, 2023 at 11:49:03AM -0700, Evan Green wrote:
> Probing for misaligned access speed takes about 0.06 seconds. On a
> system with 64 cores, doing this in smp_callin() means it's done
> serially, extending boot time by 3.8 seconds. That's a lot of boot time.
>
> Instead of measuring each CPU serially, let's do the measurements on
> all CPUs in parallel. If we disable preemption on all CPUs, the
> jiffies stop ticking, so we can do this in stages of 1) everybody
> except core 0, then 2) core 0.
>
> The measurement call in smp_callin() stays around, but is now
> conditionalized to only run if a new CPU shows up after the round of
> in-parallel measurements has run. The goal is to have the measurement
> call not run during boot or suspend/resume, but only on a hotplug
> addition.
Yay! I had just recently tested suspend/resume and wanted to report the
probe as an issue, but I hadn't gotten around to it. This patch resolves
the issue, so
Test-by: Andrew Jones <ajones@...tanamicro.com>
>
> Signed-off-by: Evan Green <evan@...osinc.com>
>
> ---
>
> Jisheng, I didn't add your Tested-by tag since the patch evolved from
> the one you tested. Hopefully this one brings you the same result.
>
> ---
> arch/riscv/include/asm/cpufeature.h | 3 ++-
> arch/riscv/kernel/cpufeature.c | 28 +++++++++++++++++++++++-----
> arch/riscv/kernel/smpboot.c | 11 ++++++++++-
> 3 files changed, 35 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h
> index d0345bd659c9..19e7817eba10 100644
> --- a/arch/riscv/include/asm/cpufeature.h
> +++ b/arch/riscv/include/asm/cpufeature.h
> @@ -30,6 +30,7 @@ DECLARE_PER_CPU(long, misaligned_access_speed);
> /* Per-cpu ISA extensions. */
> extern struct riscv_isainfo hart_isa[NR_CPUS];
>
> -void check_unaligned_access(int cpu);
> +extern bool misaligned_speed_measured;
Do we need this new state or could we just always check the boot cpu's
state to get the same information?
per_cpu(misaligned_access_speed, 0) != RISCV_HWPROBE_MISALIGNED_UNKNOWN
> +int check_unaligned_access(void *unused);
>
> #endif
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 1cfbba65d11a..8eb36e1dfb95 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -42,6 +42,9 @@ struct riscv_isainfo hart_isa[NR_CPUS];
> /* Performance information */
> DEFINE_PER_CPU(long, misaligned_access_speed);
>
> +/* Boot-time in-parallel unaligned access measurement has occurred. */
> +bool misaligned_speed_measured;
> +
> /**
> * riscv_isa_extension_base() - Get base extension word
> *
> @@ -556,8 +559,9 @@ unsigned long riscv_get_elf_hwcap(void)
> return hwcap;
> }
>
> -void check_unaligned_access(int cpu)
> +int check_unaligned_access(void *unused)
> {
> + int cpu = smp_processor_id();
> u64 start_cycles, end_cycles;
> u64 word_cycles;
> u64 byte_cycles;
> @@ -571,7 +575,7 @@ void check_unaligned_access(int cpu)
> page = alloc_pages(GFP_NOWAIT, get_order(MISALIGNED_BUFFER_SIZE));
> if (!page) {
> pr_warn("Can't alloc pages to measure memcpy performance");
> - return;
> + return 0;
> }
>
> /* Make an unaligned destination buffer. */
> @@ -643,15 +647,29 @@ void check_unaligned_access(int cpu)
>
> out:
> __free_pages(page, get_order(MISALIGNED_BUFFER_SIZE));
> + return 0;
> +}
> +
> +static void check_unaligned_access_nonboot_cpu(void *param)
> +{
> + if (smp_processor_id() != 0)
> + check_unaligned_access(param);
> }
>
> -static int check_unaligned_access_boot_cpu(void)
> +static int check_unaligned_access_all_cpus(void)
> {
> - check_unaligned_access(0);
> + /* Check everybody except 0, who stays behind to tend jiffies. */
> + on_each_cpu(check_unaligned_access_nonboot_cpu, NULL, 1);
> +
> + /* Check core 0. */
> + smp_call_on_cpu(0, check_unaligned_access, NULL, true);
> +
> + /* Boot-time measurements are complete. */
> + misaligned_speed_measured = true;
> return 0;
> }
>
> -arch_initcall(check_unaligned_access_boot_cpu);
> +arch_initcall(check_unaligned_access_all_cpus);
>
> #ifdef CONFIG_RISCV_ALTERNATIVE
> /*
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index 1b8da4e40a4d..39322ae20a75 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -27,6 +27,7 @@
> #include <linux/sched/mm.h>
> #include <asm/cpu_ops.h>
> #include <asm/cpufeature.h>
> +#include <asm/hwprobe.h>
> #include <asm/irq.h>
> #include <asm/mmu_context.h>
> #include <asm/numa.h>
> @@ -246,7 +247,15 @@ asmlinkage __visible void smp_callin(void)
>
> numa_add_cpu(curr_cpuid);
> set_cpu_online(curr_cpuid, 1);
> - check_unaligned_access(curr_cpuid);
> +
> + /*
> + * Boot-time misaligned access speed measurements are done in parallel
> + * in an initcall. Only measure here for hotplug.
> + */
> + if (misaligned_speed_measured &&
> + (per_cpu(misaligned_access_speed, curr_cpuid) == RISCV_HWPROBE_MISALIGNED_UNKNOWN)) {
> + check_unaligned_access(NULL);
> + }
>
> if (has_vector()) {
> if (riscv_v_setup_vsize())
> --
> 2.34.1
>
Besides my reluctance to add another global variable, this looks good to
me.
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
Thanks,
drew
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