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Message-ID: <8d0e2d7c-c259-69fb-ce50-ca566172db64@starfivetech.com>
Date:   Sun, 17 Sep 2023 16:49:52 +0800
From:   Minda Chen <minda.chen@...rfivetech.com>
To:     Conor Dooley <conor@...nel.org>
CC:     Daire McNamara <daire.mcnamara@...rochip.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, <linux-pci@...r.kernel.org>,
        Pali Rohár <pali@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Mason Huo <mason.huo@...rfivetech.com>,
        Leyfoon Tan <leyfoon.tan@...rfivetech.com>,
        Kevin Xie <kevin.xie@...rfivetech.com>
Subject: Re: [PATCH v6 19/19] riscv: dts: starfive: add PCIe dts configuration
 for JH7110



On 2023/9/16 8:07, Conor Dooley wrote:
> On Fri, Sep 15, 2023 at 06:22:43PM +0800, Minda Chen wrote:
>> Add PCIe dts configuraion for JH7110 SoC platform.
>> 
>> Signed-off-by: Minda Chen <minda.chen@...rfivetech.com>
>> Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>
>> Signed-off-by: Minda Chen <minda.chen@...rfivetech.com>
> 
> Not really important, but checkpatch whinges about the double signoff
> here, since both are you"
Thanks. I don't check this carefully.

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