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Message-ID: <789bc8e6-882a-3dfb-7381-fd9b5aca3c77@intel.com>
Date: Mon, 18 Sep 2023 09:58:02 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: "Joseph, Jithu" <jithu.joseph@...el.com>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
"Luck, Tony" <tony.luck@...el.com>
Cc: Hans de Goede <hdegoede@...hat.com>,
"markgross@...nel.org" <markgross@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"bp@...en8.de" <bp@...en8.de>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>,
"rostedt@...dmis.org" <rostedt@...dmis.org>,
"Raj, Ashok" <ashok.raj@...el.com>,
LKML <linux-kernel@...r.kernel.org>,
"platform-driver-x86@...r.kernel.org"
<platform-driver-x86@...r.kernel.org>,
"patches@...ts.linux.dev" <patches@...ts.linux.dev>,
"Shankar, Ravi V" <ravi.v.shankar@...el.com>,
"Xu, Pengfei" <pengfei.xu@...el.com>
Subject: Re: [PATCH 03/10] platform/x86/intel/ifs: Image loading for new
generations
On 9/18/23 09:51, Joseph, Jithu wrote:
>
> On 9/18/2023 9:29 AM, Ilpo Järvinen wrote:
>
>> In this case it is not just about the bitfield itself nor the bit
>> allocation order but sharing the storage unit with another member, and to
>> further complicate things, members have different alignment requirement
>> too (32-bit aligned u8 followed by u32 bitfield).
>>
> I too verified that the size of the whole structure matches that of MSR 64 bits (8 bytes).
>
> Initially when IFS scan was added the all MSR structure members were bit-fields, later there was a suggestion to
> use basic C types if applicable during subsequent Array BIST patch series. I followed this approach with the current patch series .
>
> I will change the current series to use all bit-field MSR structures in v2, given mixing basic types and bitfields is a a source of confusion
That's the wrong direction. :)
What is more obviously correct. This:
struct {
u16 valid_chunks;
u16 total_chunks;
u8 error_code;
u8 rsvd1;
u8 rsvd2;
u8 rsvd3;
};
or this:
struct {
u16 valid_chunks;
u16 total_chunks;
u8 error_code;
u32 error_code :8;
u32 rsvd :24;
};
?
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