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Message-ID: <20230918084207.23604-2-shawn.sung@mediatek.com>
Date: Mon, 18 Sep 2023 16:41:57 +0800
From: Hsiao Chien Sung <shawn.sung@...iatek.com>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: Daniel Vetter <daniel@...ll.ch>, David Airlie <airlied@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Chen-Yu Tsai <wenst@...omium.org>, CK Hu <ck.hu@...iatek.com>,
<dri-devel@...ts.freedesktop.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Hsiao Chien Sung <shawn.sung@...iatek.com>
Subject: [PATCH v2 01/11] soc: mediatek: Add register definitions for GCE
Add register definitions for GCE so users can use them
as a buffer to store data.
Signed-off-by: Hsiao Chien Sung <shawn.sung@...iatek.com>
---
include/linux/soc/mediatek/mtk-cmdq.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index 649955d2cf5c..a253c001c861 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -14,6 +14,16 @@
#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0)))
#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1))
+/*
+ * Every cmdq thread has its own SPRs (Specific Purpose Registers),
+ * so there are 4 * 24 (threads) = 96 SPRs in GCE that shares the
+ * same indexes below
+ */
+#define CMDQ_THR_SPR_IDX0 (0)
+#define CMDQ_THR_SPR_IDX1 (1)
+#define CMDQ_THR_SPR_IDX2 (2)
+#define CMDQ_THR_SPR_IDX3 (3)
+
struct cmdq_pkt;
struct cmdq_client_reg {
--
2.18.0
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