linux-kernel - [PATCH 1/2] media: dt-bindings: mediatek: Add phandle to mediatek,scp on MDP3 RDMA

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Message-ID: <20230919095938.70679-2-angelogioacchino.delregno@collabora.com>
Date:   Tue, 19 Sep 2023 11:59:37 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     mchehab@...nel.org
Cc:     robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, matthias.bgg@...il.com,
        angelogioacchino.delregno@...labora.com, moudy.ho@...iatek.com,
        hverkuil-cisco@...all.nl, sakari.ailus@...ux.intel.com,
        u.kleine-koenig@...gutronix.de, linqiheng@...wei.com,
        linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, kernel@...labora.com,
        wenst@...omium.org
Subject: [PATCH 1/2] media: dt-bindings: mediatek: Add phandle to mediatek,scp on MDP3 RDMA

The MDP3 RDMA needs to communicate with the SCP remote processor: allow
specifying a phandle to a SCP core.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
 .../devicetree/bindings/media/mediatek,mdp3-rdma.yaml       | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
index d639a1461143..0e5ce2e77e99 100644
--- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
@@ -46,6 +46,11 @@ properties:
       include/dt-bindings/gce/<chip>-gce.h of each chips.
     $ref: /schemas/types.yaml#/definitions/uint32-array
 
+  mediatek,scp:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the System Control Processor (SCP) node
+
   power-domains:
     oneOf:
       - items:
@@ -98,6 +103,7 @@ examples:
         mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
         mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
                               <CMDQ_EVENT_MDP_RDMA0_EOF>;
+        mediatek,scp = <&scp>;
         power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
         clocks = <&mmsys CLK_MM_MDP_RDMA0>,
                  <&mmsys CLK_MM_MDP_RSZ1>;
-- 
2.42.0