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Message-ID: <mhng-09373969-fd57-4fa2-b0fa-470004f6e17c@palmer-ri-x1c9a>
Date: Wed, 20 Sep 2023 08:19:59 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: unicornxw@...il.com
CC: aou@...s.berkeley.edu, chao.wei@...hgo.com,
Conor Dooley <conor@...nel.org>, devicetree@...r.kernel.org,
emil.renner.berthing@...onical.com, guoren@...nel.org,
jszhang@...nel.org, krzysztof.kozlowski+dt@...aro.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
Paul Walmsley <paul.walmsley@...ive.com>, robh+dt@...nel.org,
xiaoguang.xing@...hgo.com, wangchen20@...as.ac.cn,
inochiama@...look.com
Subject: Re: [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree
On Tue, 19 Sep 2023 23:40:32 PDT (-0700), unicornxw@...il.com wrote:
> Milk-V Pioneer motherboard is powered by SOPHON's SG2042.
>
> SG2042 is server grade chip with high performance, low power
> consumption and high data throughput.
> Key features:
> - 64 RISC-V cpu cores which implements IMAFDC
> - 4 cores per cluster, 16 clusters on chip
> - ......
>
> More info is available at [1].
>
> [1]: https://en.sophgo.com/product/introduce/sg2042.html
>
> Currently only support booting into console with only uart,
> other features will be added soon later.
>
> Acked-by: Xiaoguang Xing <xiaoguang.xing@...hgo.com>
> Signed-off-by: Xiaoguang Xing <xiaoguang.xing@...hgo.com>
> Signed-off-by: Inochi Amaoto <inochiama@...look.com>
> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> Signed-off-by: Chen Wang <wangchen20@...as.ac.cn>
> ---
> arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi | 1744 +++++++++++++++++++
> arch/riscv/boot/dts/sophgo/sg2042.dtsi | 439 +++++
> 2 files changed, 2183 insertions(+)
> create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
> create mode 100644 arch/riscv/boot/dts/sophgo/sg2042.dtsi
Just an FYI: a handful of replies to this are getting blocked by the
lists as they end up being too big. I just went and allowed what was
there, but future replies will probably require someone to be away as
well and thus might be slow.
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