linux-kernel - Re: [PATCH 09/17] m68k: Implement xor_unlock_is_negative

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1b677562-929c-62f7-353d-80af3c30c7c4@westnet.com.au>
Date:   Wed, 20 Sep 2023 17:15:56 +1000
From:   Greg Ungerer <gregungerer@...tnet.com.au>
To:     David Laight <David.Laight@...LAB.COM>,
        'Matthew Wilcox' <willy@...radead.org>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-fsdevel@...r.kernel.org" <linux-fsdevel@...r.kernel.org>,
        "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
        "torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>,
        Nicholas Piggin <npiggin@...il.com>
Subject: Re: [PATCH 09/17] m68k: Implement xor_unlock_is_negative_byte



On 20/9/23 01:57, David Laight wrote:
> From: Matthew Wilcox
>> Sent: 19 September 2023 16:47
>>
>> On Tue, Sep 19, 2023 at 03:22:25PM +0000, David Laight wrote:
>>>> Anyway, that's not the brief.  We're looking to (eg) clear bit 0
>>>> and test whether bit 7 was set.  So it's the sign bit of the byte,
>>>> not the sign bit of the int.
>>>
>>> Use the address of the byte as an int and xor with 1u<<24.
>>> The xor will do a rmw on the three bytes following, but I
>>> doubt that matters.
>>
>> Bet you a shiny penny that Coldfire takes an unaligned access trap ...
> 
> and then the 'firmware' silently fixed it up for you a few 1000
> clocks later...
> 
>> and besides, this is done on _every_ call to unlock_page().  That might
>> cross not only a cacheline boundary but also a page boundary.  I cannot
>> believe that would be a high-performing solution.  It might be just fine
>> on m68000 but I bet even by the 030 it's lower performing.
> 
> I do remember managing to use 'cas2' to add an item to a linked list.
> But it is so painful so setup it was better just to disable interrupts.
> For non-smp that is almost certainly ok.
> (Unless the instructions are slow because of synchronisation.)
> Otherwise you need to use 'cas' on the aligned word.
> Assuming coldfire even has cas.

It doesn't. See CONFIG_CPU_HAS_NO_CAS in arch/m68k/Kconfig.cpu for how
m68k deals with ColdFire and early 68000 parts not having it.

Regards
Greg


> 
> 	David
> 
> -
> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
> Registration No: 1397386 (Wales)
>