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Message-ID: <CAOnJCU+0iUR+ziwkPnEykoS+Ym8zkG-Afs_XyyCSD4fi8wjP6w@mail.gmail.com>
Date: Tue, 19 Sep 2023 17:11:58 -0700
From: Atish Patra <atishp@...shpatra.org>
To: Anup Patel <apatel@...tanamicro.com>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Frank Rowand <frowand.list@...il.com>,
Conor Dooley <conor+dt@...nel.org>,
Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Saravana Kannan <saravanak@...gle.com>,
Anup Patel <anup@...infault.org>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v8 01/16] RISC-V: Don't fail in riscv_of_parent_hartid()
for disabled HARTs
On Tue, Sep 12, 2023 at 10:50 AM Anup Patel <apatel@...tanamicro.com> wrote:
>
> The riscv_of_processor_hartid() used by riscv_of_parent_hartid() fails
> for HARTs disabled in the DT. This results in the following warning
> thrown by the RISC-V INTC driver for the E-core on SiFive boards:
>
> [ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@...nterrupt-controller
>
> The riscv_of_parent_hartid() is only expected to read the hartid from
> the DT so we should directly call of_get_cpu_hwid() instead of calling
> riscv_of_processor_hartid().
>
> Fixes: ad635e723e17 ("riscv: cpu: Add 64bit hartid support on RV64")
> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> ---
> arch/riscv/kernel/cpu.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index c17dacb1141c..157ace8b262c 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -125,13 +125,14 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo
> */
> int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
> {
> - int rc;
> -
> for (; node; node = node->parent) {
> if (of_device_is_compatible(node, "riscv")) {
> - rc = riscv_of_processor_hartid(node, hartid);
> - if (!rc)
> - return 0;
> + *hartid = (unsigned long)of_get_cpu_hwid(node, 0);
> + if (*hartid == ~0UL) {
> + pr_warn("Found CPU without hart ID\n");
> + return -ENODEV;
> + }
> + return 0;
> }
> }
>
> --
> 2.34.1
>
LGTM.
Reviewed-by: Atish Patra <atishp@...osinc.com>
--
Regards,
Atish
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