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Message-ID: <CAJF2gTQym7Ad8y+m368hr7RgcjNpc2TfWRT8qu0cJyhJHm9vuQ@mail.gmail.com>
Date: Wed, 20 Sep 2023 15:34:58 +0800
From: Guo Ren <guoren@...nel.org>
To: Chen Wang <unicornxw@...il.com>
Cc: aou@...s.berkeley.edu, chao.wei@...hgo.com, conor@...nel.org,
devicetree@...r.kernel.org, emil.renner.berthing@...onical.com,
jszhang@...nel.org, krzysztof.kozlowski+dt@...aro.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
palmer@...belt.com, paul.walmsley@...ive.com, robh+dt@...nel.org,
xiaoguang.xing@...hgo.com, Chen Wang <wangchen20@...as.ac.cn>
Subject: Re: [PATCH v2 01/11] riscv: Add SOPHGO SOC family Kconfig support
On Wed, Sep 20, 2023 at 2:35 PM Chen Wang <unicornxw@...il.com> wrote:
>
> The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
> cores.
>
> Acked-by: Xiaoguang Xing <xiaoguang.xing@...hgo.com>
> Signed-off-by: Chen Wang <wangchen20@...as.ac.cn>
> ---
> arch/riscv/Kconfig.socs | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 6833d01e2e70..d4df7b5d0f16 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -22,6 +22,11 @@ config SOC_SIFIVE
> help
> This enables support for SiFive SoC platform hardware.
>
> +config ARCH_SOPHGO
> + bool "Sophgo SoCs"
> + help
> + This enables support for Sophgo SoC platform hardware.
> +
Reviewed-by: Guo Ren <guoren@...nel.org>
> config ARCH_STARFIVE
> def_bool SOC_STARFIVE
>
> --
> 2.25.1
>
--
Best Regards
Guo Ren
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