linux-kernel - Re: [PATCH V5 - RESEND 1/3] coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus

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Date:   Wed, 20 Sep 2023 10:11:27 +0100
From:   Suzuki K Poulose <suzuki.poulose@....com>
To:     Anshuman Khandual <anshuman.khandual@....com>,
        linux-arm-kernel@...ts.infradead.org
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Mike Leach <mike.leach@...aro.org>,
        James Clark <james.clark@....com>,
        Leo Yan <leo.yan@...aro.org>, Jonathan Corbet <corbet@....net>,
        linux-doc@...r.kernel.org, coresight@...ts.linaro.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH V5 - RESEND 1/3] coresight: etm: Override TRCIDR3.CCITMIN
 on errata affected cpus

On 20/09/2023 07:40, Anshuman Khandual wrote:
> 
> 
> On 9/19/23 16:56, Suzuki K Poulose wrote:
>> Hi Anshuman
>>

>>> +
>>> +static bool etm4_core_reads_wrong_ccitmin(struct etmv4_drvdata *drvdata)
>>> +{
>>> +    /*
>>> +     * Erratum affected cpus will read 256 as the minimum
>>> +     * instruction trace cycle counting threshold whereas
>>> +     * the correct value should be 4 instead. Override the
>>> +     * recorded value for 'drvdata->ccitmin' to workaround
>>> +     * this problem.
>>> +     */
>>> +    return is_midr_in_range_list(read_cpuid_id(), etm_wrong_ccitmin_cpus) &&
>>> +           (drvdata->ccitmin == 256);
>>
>> minor nit: Having looked at this, it feels like, fixing the ccitmin
>> value to 4, could be moved into this function. Otherwise,  we have all
>> the required information about the erratum and the real application of
>> work around is left in the caller, which kind of feels disconnected.
>>
>> So, please could we rename the above function to:
>>
>> static void etm4_fixup_wrong_ccitmin(str..)
>> {
>>    /* Comment as above */
>>     if (....)
>>      drvdata->ccitmin = 4;
>> }
> 
> I will fold in the following change for the patch. Please do let me
> know if this reflects your suggestions accurately. Also planning to
> carry Mike's tag after the change.
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index 044aed25979b..5b6a878a2ac5 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -1175,7 +1175,7 @@ static struct midr_range etm_wrong_ccitmin_cpus[] = {
>          {},
>   };
>   
> -static bool etm4_core_reads_wrong_ccitmin(struct etmv4_drvdata *drvdata)
> +static void etm4_fixup_wrong_ccitmin(struct etmv4_drvdata *drvdata)
>   {
>          /*
>           * Erratum affected cpus will read 256 as the minimum
> @@ -1184,8 +1184,10 @@ static bool etm4_core_reads_wrong_ccitmin(struct etmv4_drvdata *drvdata)
>           * recorded value for 'drvdata->ccitmin' to workaround
>           * this problem.
>           */
> -       return is_midr_in_range_list(read_cpuid_id(), etm_wrong_ccitmin_cpus) &&
> -              (drvdata->ccitmin == 256);
> +       if (is_midr_in_range_list(read_cpuid_id(), etm_wrong_ccitmin_cpus)) {
> +               if (drvdata->ccitmin == 256)
> +                       drvdata->ccitmin = 4;
> +       }
>   }
>   
>   static void etm4_init_arch_data(void *info)
> @@ -1252,8 +1254,7 @@ static void etm4_init_arch_data(void *info)
>          etmidr3 = etm4x_relaxed_read32(csa, TRCIDR3);
>          /* CCITMIN, bits[11:0] minimum threshold value that can be programmed */
>          drvdata->ccitmin = FIELD_GET(TRCIDR3_CCITMIN_MASK, etmidr3);
> -       if (etm4_core_reads_wrong_ccitmin(drvdata))
> -               drvdata->ccitmin = 4;
> +       etm4_fixup_wrong_ccitmin(drvdata);
>   
>          /* EXLEVEL_S, bits[19:16] Secure state instruction tracing */
>          drvdata->s_ex_level = FIELD_GET(TRCIDR3_EXLEVEL_S_MASK, etmidr3);
> 


LGTM, thanks for addressing it quickly

Suzuki