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Message-ID: <AM6PR04MB6341AF5F905DAB0EFFEB3B81E7F9A@AM6PR04MB6341.eurprd04.prod.outlook.com>
Date: Wed, 20 Sep 2023 02:29:30 +0000
From: Ming Qian <ming.qian@....com>
To: Shawn Guo <shawnguo@...nel.org>
CC: "Mirela Rabulea (OSS)" <mirela.rabulea@....nxp.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
dl-linux-imx <linux-imx@....com>,
"linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [EXT] Re: [PATCH] arm64: dts: imx8-ss-img: Assign slot for imx
jpeg encoder/decoder
>> assign a single slot,
>> configure interrupt and power domain only for 1 slot, not for the all
>> 4 slots.
>>
>> Signed-off-by: Ming Qian <ming.qian@....com>
>> ---
>> .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22
>> +++++--------------
>> 1 file changed, 6 insertions(+), 16 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> index a90654155a88..176dcce24b64 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> @@ -18,10 +18,7 @@ img_ipg_clk: clock-img-ipg {
>>
>> jpegdec: jpegdec@...00000 {
>> reg = <0x58400000 0x00050000>;
>> - interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
>> clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
>> <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>> clock-names = "per", "ipg"; @@ -29,18 +26,13 @@ jpegdec:
>> jpegdec@...00000 {
>> <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>> assigned-clock-rates = <200000000>, <200000000>;
>> power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
>> - <&pd IMX_SC_R_MJPEG_DEC_S0>,
>> - <&pd IMX_SC_R_MJPEG_DEC_S1>,
>> - <&pd IMX_SC_R_MJPEG_DEC_S2>,
>> - <&pd IMX_SC_R_MJPEG_DEC_S3>;
>> + <&pd IMX_SC_R_MJPEG_DEC_S0>;
>> + slot = <0>;
>
>I do not find this 'slot' property in bindings doc.
I'll add it in v2
>
>Shawn
>
>> };
>>
>> jpegenc: jpegenc@...50000 {
>> reg = <0x58450000 0x00050000>;
>> - interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
>> clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
>> <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>> clock-names = "per", "ipg"; @@ -48,10 +40,8 @@ jpegenc:
>> jpegenc@...50000 {
>> <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>> assigned-clock-rates = <200000000>, <200000000>;
>> power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
>> - <&pd IMX_SC_R_MJPEG_ENC_S0>,
>> - <&pd IMX_SC_R_MJPEG_ENC_S1>,
>> - <&pd IMX_SC_R_MJPEG_ENC_S2>,
>> - <&pd IMX_SC_R_MJPEG_ENC_S3>;
>> + <&pd IMX_SC_R_MJPEG_ENC_S0>;
>> + slot = <0>;
>> };
>>
>> img_jpeg_dec_lpcg: clock-controller@...d0000 {
>> --
>> 2.38.1
>>
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