linux-kernel - Re: [PATCH V5 - RESEND 3/3] Documentation: coresight: Add cc

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1caff361-3680-3e65-f66e-f61938242de5@arm.com>
Date:   Wed, 20 Sep 2023 16:11:02 +0530
From:   Anshuman Khandual <anshuman.khandual@....com>
To:     Suzuki K Poulose <suzuki.poulose@....com>,
        linux-arm-kernel@...ts.infradead.org
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Mike Leach <mike.leach@...aro.org>,
        Jonathan Corbet <corbet@....net>, linux-doc@...r.kernel.org,
        coresight@...ts.linaro.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V5 - RESEND 3/3] Documentation: coresight: Add
 cc_threshold tunable



On 9/20/23 14:55, Suzuki K Poulose wrote:
> On 15/09/2023 10:36, Anshuman Khandual wrote:
>> This updates config option to include 'cc_threshold' tunable value.
>>
>> Cc: Suzuki K Poulose <suzuki.poulose@....com>
>> Cc: Mike Leach <mike.leach@...aro.org>
>> Cc: James Clark <james.clark@....com>
>> Cc: Jonathan Corbet <corbet@....net>
>> Cc: coresight@...ts.linaro.org
>> Cc: linux-arm-kernel@...ts.infradead.org
>> Cc: linux-doc@...r.kernel.org
>> Cc: linux-kernel@...r.kernel.org
>> Reviewed by: Mike Leach <mike.leach@...aro.org>
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
>> ---
>>   Documentation/trace/coresight/coresight.rst | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst
>> index 4a71ea6cb390..ce55adb80b82 100644
>> --- a/Documentation/trace/coresight/coresight.rst
>> +++ b/Documentation/trace/coresight/coresight.rst
>> @@ -624,6 +624,10 @@ They are also listed in the folder /sys/bus/event_source/devices/cs_etm/format/
>>      * - timestamp
>>        - Session local version of the system wide setting: :ref:`ETMv4_MODE_TIMESTAMP
>>          <coresight-timestamp>`
>> +   * - cc_threshold
>> +     - Cycle count threshold value. If nothing is provided here or the provided value is 0, then the
>> +       default value i.e 0x100 will be used. If provided value is less than minimum cycles threshold
>> +       value, as indicated via TRCIDR3.CCITMIN, then the minimum value will be used instead.
>>     How to use the STM module
>>   -------------------------
> 
> The patch as such looks good to me. If possible, could you fold this into the previous patch ?

Being a documentation update, may be it's better to have this in a separate patch.