[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <085176da-924e-8d6d-1c56-8bfc9d457b0b@suse.com>
Date: Wed, 20 Sep 2023 13:50:53 +0300
From: Nikolay Borisov <nik.borisov@...e.com>
To: Xin Li <xin3.li@...el.com>, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-edac@...r.kernel.org,
linux-hyperv@...r.kernel.org, kvm@...r.kernel.org,
xen-devel@...ts.xenproject.org
Cc: tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
luto@...nel.org, pbonzini@...hat.com, seanjc@...gle.com,
peterz@...radead.org, jgross@...e.com, ravi.v.shankar@...el.com,
mhiramat@...nel.org, andrew.cooper3@...rix.com,
jiangshanlai@...il.com
Subject: Re: [PATCH v10 13/38] x86/cpu: Add X86_CR4_FRED macro
On 14.09.23 г. 7:47 ч., Xin Li wrote:
> From: "H. Peter Anvin (Intel)" <hpa@...or.com>
>
> Add X86_CR4_FRED macro for the FRED bit in %cr4. This bit must not be
> changed after initialization, so add it to the pinned CR4 bits.
>
> Signed-off-by: H. Peter Anvin (Intel) <hpa@...or.com>
> Tested-by: Shan Kang <shan.kang@...el.com>
> Signed-off-by: Xin Li <xin3.li@...el.com>
> ---
>
> Changes since v9:
> * Avoid a type cast by defining X86_CR4_FRED as 0 on 32-bit (Thomas
> Gleixner).
> ---
> arch/x86/include/uapi/asm/processor-flags.h | 7 +++++++
> arch/x86/kernel/cpu/common.c | 5 ++---
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h
> index d898432947ff..f1a4adc78272 100644
> --- a/arch/x86/include/uapi/asm/processor-flags.h
> +++ b/arch/x86/include/uapi/asm/processor-flags.h
> @@ -139,6 +139,13 @@
> #define X86_CR4_LAM_SUP_BIT 28 /* LAM for supervisor pointers */
> #define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT)
>
> +#ifdef __x86_64__
> +#define X86_CR4_FRED_BIT 32 /* enable FRED kernel entry */
> +#define X86_CR4_FRED _BITUL(X86_CR4_FRED_BIT)
nit: s/BITUL/BITULL I guess if __x86_64__ is defined then we are
guaranteed that unsigned long will be a 64 bit, but for the sake of
clarity I'd rather have this spelled out explicitly by using BITULL
> +#else
> +#define X86_CR4_FRED (0)
> +#endif
> +
> /*
> * x86-64 Task Priority Register, CR8
> */
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index 317b4877e9c7..42511209469b 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -400,9 +400,8 @@ static __always_inline void setup_umip(struct cpuinfo_x86 *c)
> }
>
> /* These bits should not change their value after CPU init is finished. */
> -static const unsigned long cr4_pinned_mask =
> - X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP |
> - X86_CR4_FSGSBASE | X86_CR4_CET;
> +static const unsigned long cr4_pinned_mask = X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP |
> + X86_CR4_FSGSBASE | X86_CR4_CET | X86_CR4_FRED;
> static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning);
> static unsigned long cr4_pinned_bits __ro_after_init;
>
Powered by blists - more mailing lists