linux-kernel - Re: [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint

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Message-ID: <3172861a-4f13-363c-e3af-c7047899501b@linaro.org>
Date:   Wed, 20 Sep 2023 15:09:16 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Conor Dooley <conor@...nel.org>,
        Inochi Amaoto <inochiama@...look.com>
Cc:     aou@...s.berkeley.edu, chao.wei@...hgo.com,
        evicetree@...r.kernel.org, emil.renner.berthing@...onical.com,
        guoren@...nel.org, jszhang@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, palmer@...belt.com,
        paul.walmsley@...ive.com, robh+dt@...nel.org,
        xiaoguang.xing@...hgo.com, Chen Wang <wangchen20@...as.ac.cn>
Subject: Re: [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint

On 20/09/2023 14:58, Conor Dooley wrote:
> On Wed, Sep 20, 2023 at 08:40:07PM +0800, Inochi Amaoto wrote:
>>> On 20/09/2023 14:15, Inochi Amaoto wrote:
>>>>> On 20/09/2023 08:39, Chen Wang wrote:
>>>>>> From: Inochi Amaoto <inochiama@...look.com>
>>>>>>
>>>>>> Add two new compatible string formatted like `C9xx-clint-xxx` to identify
>>>>>> the timer and ipi device separately, and do not allow c900-clint as the
>>>>>
>>>>> Why?
>>>>>
>>>>
>>>> If use the same compatible, SBI will process this twice in both ipi and
>>>> timer, use different compatible will allow SBI to treat these as different.
>>>> AFAIK, the aclint in SBI use the same concepts, which make hard to use the
>>>> second register range. I have explained in another response.
>>>
>>> What is a SBI? Linux driver? If so, why some intermediate Linux driver
>>> choice should affect bindings?
>>> Best regards,
>>> Krzysztof
>>>
>>
>> SBI (Supervisor Binary Interface) is defined by riscv, which is an interface
>> between the Supervisor Execution Environment (SEE) and the supervisor. The
>> detailed documentation can be found in [1].
>>
>> The implement of SBI needs fdt info of the platform, which is provided by
>> kernel. So we need a dt-bindings for these devices, and these will be
>> processed by SBI.
>>
>> [1] https://github.com/riscv-non-isa/riscv-sbi-doc
> 
> Yeah, this is the unfortunate problem of half-baked bindings (IMO)
> ending up in OpenSBI (which likely means they also ended up in QEMU).
> This T-Head stuff is coming across our (metaphorical) desks, so we are
> obviously going to try to do things correctly. I may end up speaking to
> Anup later today, if I do I will point him at this thread (if he hasn't
> seen it already).

If the OpenSBI started to work with some half-baked-bindings before
proper review, it's their loss. If we do not push back on such stuff,
how our review can ever matter?

Anyway, firmware/SBI/whatever parsing compatible twice is not really a
reason to model same thing with two different compatibles. Assuming of
course this is the same thing.

Best regards,
Krzysztof