| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <ZQw/7/3jOJf7BOPt@shell.armlinux.org.uk>
Date: Thu, 21 Sep 2023 14:06:55 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Choong Yong Liang <yong.liang.choong@...ux.intel.com>
Cc: Rajneesh Bhardwaj <irenic.rajneesh@...il.com>,
David E Box <david.e.box@...ux.intel.com>,
Hans de Goede <hdegoede@...hat.com>,
Mark Gross <markgross@...nel.org>,
Jose Abreu <Jose.Abreu@...opsys.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
"David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Marek Behún <kabel@...nel.org>,
Jean Delvare <jdelvare@...e.com>,
Guenter Roeck <linux@...ck-us.net>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Richard Cochran <richardcochran@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Alexei Starovoitov <ast@...nel.org>,
Daniel Borkmann <daniel@...earbox.net>,
Jesper Dangaard Brouer <hawk@...nel.org>,
John Fastabend <john.fastabend@...il.com>,
Wong Vee Khee <veekhee@...le.com>,
Jon Hunter <jonathanh@...dia.com>,
Jesse Brandeburg <jesse.brandeburg@...el.com>,
Revanth Kumar Uppala <ruppala@...dia.com>,
Shenwei Wang <shenwei.wang@....com>,
Andrey Konovalov <andrey.konovalov@...aro.org>,
Jochen Henneberg <jh@...neberg-systemdesign.com>,
David E Box <david.e.box@...el.com>,
Andrew Halaney <ahalaney@...hat.com>,
Simon Horman <simon.horman@...igine.com>,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org,
platform-driver-x86@...r.kernel.org, linux-hwmon@...r.kernel.org,
bpf@...r.kernel.org, Voon Wei Feng <weifeng.voon@...el.com>,
Tan Tee Min <tee.min.tan@...ux.intel.com>,
Michael Sit Wei Hong <michael.wei.hong.sit@...el.com>,
Lai Peter Jun Ann <jun.ann.lai@...el.com>
Subject: Re: [PATCH net-next v3 2/5] net: pcs: xpcs: combine C37 SGMII AN and
2500BASEX for Intel mGbE controller
On Thu, Sep 21, 2023 at 08:19:43PM +0800, Choong Yong Liang wrote:
> From: "Tan, Tee Min" <tee.min.tan@...ux.intel.com>
>
> This commit introduces xpcs_sgmii_2500basex_features[] that combine
> xpcs_sgmii_features[] and xpcs_2500basex_features[] for Intel mGbE
> controller that desire to interchange the speed mode of
> 10/100/1000/2500Mbps at runtime.
>
> Also, we introduce xpcs_config_aneg_c37_sgmii_2500basex() function
Clause 37... SGMII? 2500base-X? Technically, clause 37 doesn't cover
2500base-X.
> which is called by the xpcs_do_config() with the new AN mode:
> DW_SGMII_2500BASEX, and this new function will proceed next-level
> calling to perform C37 SGMII AN/2500BASEX configuration based on
> the PHY interface updated by PHY driver.
>
> Signed-off-by: Tan, Tee Min <tee.min.tan@...ux.intel.com>
> Signed-off-by: Choong Yong Liang <yong.liang.choong@...ux.intel.com>
> ---
> drivers/net/pcs/pcs-xpcs.c | 72 ++++++++++++++++++++++++++++++------
> include/linux/pcs/pcs-xpcs.h | 1 +
> 2 files changed, 62 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
> index 4dbc21f604f2..60d90191677d 100644
> --- a/drivers/net/pcs/pcs-xpcs.c
> +++ b/drivers/net/pcs/pcs-xpcs.c
> @@ -104,6 +104,21 @@ static const int xpcs_2500basex_features[] = {
> __ETHTOOL_LINK_MODE_MASK_NBITS,
> };
>
> +static const int xpcs_sgmii_2500basex_features[] = {
> + ETHTOOL_LINK_MODE_Pause_BIT,
> + ETHTOOL_LINK_MODE_Asym_Pause_BIT,
> + ETHTOOL_LINK_MODE_Autoneg_BIT,
> + ETHTOOL_LINK_MODE_10baseT_Half_BIT,
> + ETHTOOL_LINK_MODE_10baseT_Full_BIT,
> + ETHTOOL_LINK_MODE_100baseT_Half_BIT,
> + ETHTOOL_LINK_MODE_100baseT_Full_BIT,
> + ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
> + ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
The connected PHY could be one that supports 1000baseX as well.
> + ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
> + ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
> + __ETHTOOL_LINK_MODE_MASK_NBITS,
> +};
> +
> static const phy_interface_t xpcs_usxgmii_interfaces[] = {
> PHY_INTERFACE_MODE_USXGMII,
> };
> @@ -133,6 +148,12 @@ static const phy_interface_t xpcs_2500basex_interfaces[] = {
> PHY_INTERFACE_MODE_MAX,
> };
>
> +static const phy_interface_t xpcs_sgmii_2500basex_interfaces[] = {
> + PHY_INTERFACE_MODE_SGMII,
> + PHY_INTERFACE_MODE_2500BASEX,
> + PHY_INTERFACE_MODE_MAX,
> +};
> +
> enum {
> DW_XPCS_USXGMII,
> DW_XPCS_10GKR,
> @@ -141,6 +162,7 @@ enum {
> DW_XPCS_SGMII,
> DW_XPCS_1000BASEX,
> DW_XPCS_2500BASEX,
> + DW_XPCS_SGMII_2500BASEX,
> DW_XPCS_INTERFACE_MAX,
> };
>
> @@ -290,6 +312,7 @@ static int xpcs_soft_reset(struct dw_xpcs *xpcs,
> case DW_AN_C37_SGMII:
> case DW_2500BASEX:
> case DW_AN_C37_1000BASEX:
> + case DW_SGMII_2500BASEX:
> dev = MDIO_MMD_VEND2;
> break;
> default:
> @@ -748,6 +771,8 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs,
> if (xpcs->dev_flag == DW_DEV_TXGBE)
> ret |= DW_VR_MII_DIG_CTRL1_PHY_MODE_CTRL;
>
> + /* Disable 2.5G GMII for SGMII C37 mode */
> + ret &= ~DW_VR_MII_DIG_CTRL1_2G5_EN;
Do you know that this is correct for every user of this function?
> ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);
> if (ret < 0)
> return ret;
> @@ -848,6 +873,26 @@ static int xpcs_config_2500basex(struct dw_xpcs *xpcs)
> return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret);
> }
>
> +static int xpcs_config_aneg_c37_sgmii_2500basex(struct dw_xpcs *xpcs,
> + unsigned int neg_mode,
> + phy_interface_t interface)
> +{
> + int ret = -EOPNOTSUPP;
> +
> + switch (interface) {
> + case PHY_INTERFACE_MODE_SGMII:
> + ret = xpcs_config_aneg_c37_sgmii(xpcs, neg_mode);
> + break;
> + case PHY_INTERFACE_MODE_2500BASEX:
> + ret = xpcs_config_2500basex(xpcs);
> + break;
> + default:
> + break;
> + }
> +
> + return ret;
> +}
> +
> int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,
> const unsigned long *advertising, unsigned int neg_mode)
> {
> @@ -890,6 +935,12 @@ int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,
> if (ret)
> return ret;
> break;
> + case DW_SGMII_2500BASEX:
> + ret = xpcs_config_aneg_c37_sgmii_2500basex(xpcs, neg_mode,
> + interface);
> + if (ret)
> + return ret;
> + break;
> default:
> return -1;
> }
> @@ -1114,6 +1165,11 @@ static void xpcs_get_state(struct phylink_pcs *pcs,
> }
> break;
> case DW_AN_C37_SGMII:
> + case DW_SGMII_2500BASEX:
> + /* 2500BASEX is not supported for in-band AN mode. */
> + if (state->interface == PHY_INTERFACE_MODE_2500BASEX)
> + break;
> +
> ret = xpcs_get_state_c37_sgmii(xpcs, state);
> if (ret) {
> pr_err("xpcs_get_state_c37_sgmii returned %pe\n",
> @@ -1266,23 +1322,17 @@ static const struct xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = {
> .num_interfaces = ARRAY_SIZE(xpcs_10gbaser_interfaces),
> .an_mode = DW_10GBASER,
> },
> - [DW_XPCS_SGMII] = {
> - .supported = xpcs_sgmii_features,
> - .interface = xpcs_sgmii_interfaces,
> - .num_interfaces = ARRAY_SIZE(xpcs_sgmii_interfaces),
> - .an_mode = DW_AN_C37_SGMII,
> - },
Doesn't this break SGMII-only support (those using DW_XPCS_SGMII) ?
> [DW_XPCS_1000BASEX] = {
> .supported = xpcs_1000basex_features,
> .interface = xpcs_1000basex_interfaces,
> .num_interfaces = ARRAY_SIZE(xpcs_1000basex_interfaces),
> .an_mode = DW_AN_C37_1000BASEX,
> },
> - [DW_XPCS_2500BASEX] = {
> - .supported = xpcs_2500basex_features,
> - .interface = xpcs_2500basex_interfaces,
> - .num_interfaces = ARRAY_SIZE(xpcs_2500basex_interfaces),
> - .an_mode = DW_2500BASEX,
Doesn't this break 2500base-X only support (those using
DW_XPCS_2500BASEX)?
> + [DW_XPCS_SGMII_2500BASEX] = {
> + .supported = xpcs_sgmii_2500basex_features,
> + .interface = xpcs_sgmii_2500basex_interfaces,
> + .num_interfaces = ARRAY_SIZE(xpcs_sgmii_2500basex_features),
> + .an_mode = DW_SGMII_2500BASEX,
> },
> };
>
> diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h
> index da3a6c30f6d2..f075d2fca54a 100644
> --- a/include/linux/pcs/pcs-xpcs.h
> +++ b/include/linux/pcs/pcs-xpcs.h
> @@ -19,6 +19,7 @@
> #define DW_2500BASEX 3
> #define DW_AN_C37_1000BASEX 4
> #define DW_10GBASER 5
> +#define DW_SGMII_2500BASEX 6
>
> /* device vendor OUI */
> #define DW_OUI_WX 0x0018fc80
> --
> 2.25.1
>
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
Powered by blists - more mailing lists