linux-kernel - Re: [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 21 Sep 2023 13:06:20 +0100
From:   Conor Dooley <conor@...nel.org>
To:     Chen Wang <unicornxw@...il.com>
Cc:     Conor Dooley <conor.dooley@...rochip.com>, aou@...s.berkeley.edu,
        chao.wei@...hgo.com, devicetree@...r.kernel.org,
        emil.renner.berthing@...onical.com, guoren@...nel.org,
        jszhang@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        palmer@...belt.com, paul.walmsley@...ive.com, robh+dt@...nel.org,
        xiaoguang.xing@...hgo.com, Chen Wang <wangchen20@...as.ac.cn>,
        Inochi Amaoto <inochiama@...look.com>
Subject: Re: [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC
 device tree

On Thu, Sep 21, 2023 at 06:27:09PM +0800, Chen Wang wrote:
> Conor Dooley <conor@...nel.org> 于2023年9月21日周四 18:15写道：
> >
> > On Thu, Sep 21, 2023 at 05:56:28PM +0800, Chen Wang wrote:

> > > > > +
> > > > > +/ {
> > > > > +     compatible = "sophgo,sg2042";
> > > > > +     #address-cells = <2>;
> > > > > +     #size-cells = <2>;
> > > > > +     dma-noncoherent;
> > > > > +
> > > > > +     aliases {
> > > > > +             serial0 = &uart0;
> > > > > +     };
> > > > > +
> > > > > +     /* the mem node will be updated by ZSBL. */
> > > >
> > > > huh? So these are random numbers below? Either put something useful here
> > > > or delete it please.
> > >
> > > The memory for SG2042 is not fixed, the bootloader will detect memory
> > > installed on board during booting and fill the actual address and size
> > > in the memory node. The comment " /* the mem node will be updated by
> > > ZSBL. */" is telling this.
> >
> > Yes, I read the comment!
> >
> > > We write memory nodes like this to make them act just as placeholders
> > > and the value is by default written as zero.
> >
> > Why knowingly add something that is wrong, rather than omitting them
> > entirely?
> 
> We learn this from arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts,
> it writes DTS as following:
> 
> ```
>         memory@0 {
>                 device_type = "memory";
>                 /* rewrite this at bootloader */
>                 reg = <0x0 0x0 0x0 0x0>;
>         };
> ```
> So you mean we can totally remove the memory nodes in DTS and make
> bootloader add it by itself? That sounds a good idea, I will have a
> try. I used to think memory nodes are must-have in DTS.

AFAIR, the ones for the d1 based systems (like the nezha I have) don't
have a memory node at all.

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)