[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230921025110.3717583-8-jtp.park@samsung.com>
Date: Thu, 21 Sep 2023 11:51:10 +0900
From: Jeongtae Park <jtp.park@...sung.com>
To: Dan Williams <dan.j.williams@...el.com>,
Alison Schofield <alison.schofield@...el.com>,
Vishal Verma <vishal.l.verma@...el.com>,
Ben Widawsky <bwidawsk@...nel.org>,
Jonathan Cameron <jonathan.cameron@...wei.com>,
Dave Jiang <dave.jiang@...el.com>,
Davidlohr Bueso <dave@...olabs.net>,
Fan Ni <fan.ni@...sung.com>, linux-cxl@...r.kernel.org
Cc: linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Kyungsan Kim <ks0204.kim@...sung.com>,
Wonjae Lee <wj28.lee@...sung.com>,
Hojin Nam <hj96.nam@...sung.com>,
Junhyeok Im <junhyeok.im@...sung.com>,
Jehoon Park <jehoon.park@...sung.com>,
Jeongtae Park <jeongtae.park@...il.com>,
Jeongtae Park <jtp.park@...sung.com>
Subject: [PATCH 7/7] cxl/trace: Enclose a multiple statements macro in a do
while loop
ERROR: Macros with complex values should be enclosed in parentheses
Signed-off-by: Jeongtae Park <jtp.park@...sung.com>
---
drivers/cxl/core/trace.h | 24 +++++++++++++-----------
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index 7aee7fb008a5..e2338773dcd6 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -199,17 +199,19 @@ TRACE_EVENT(cxl_overflow,
__field(u8, hdr_maint_op_class)
#define CXL_EVT_TP_fast_assign(cxlmd, l, hdr) \
- __assign_str(memdev, dev_name(&(cxlmd)->dev)); \
- __assign_str(host, dev_name((cxlmd)->dev.parent)); \
- __entry->log = (l); \
- __entry->serial = (cxlmd)->cxlds->serial; \
- memcpy(&__entry->hdr_uuid, &(hdr).id, sizeof(uuid_t)); \
- __entry->hdr_length = (hdr).length; \
- __entry->hdr_flags = get_unaligned_le24((hdr).flags); \
- __entry->hdr_handle = le16_to_cpu((hdr).handle); \
- __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle); \
- __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp); \
- __entry->hdr_maint_op_class = (hdr).maint_op_class
+ do { \
+ __assign_str(memdev, dev_name(&(cxlmd)->dev)); \
+ __assign_str(host, dev_name((cxlmd)->dev.parent)); \
+ __entry->log = (l); \
+ __entry->serial = (cxlmd)->cxlds->serial; \
+ memcpy(&__entry->hdr_uuid, &(hdr).id, sizeof(uuid_t)); \
+ __entry->hdr_length = (hdr).length; \
+ __entry->hdr_flags = get_unaligned_le24((hdr).flags); \
+ __entry->hdr_handle = le16_to_cpu((hdr).handle); \
+ __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle); \
+ __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp); \
+ __entry->hdr_maint_op_class = (hdr).maint_op_class; \
+ } while (0)
#define CXL_EVT_TP_printk(fmt, ...) \
TP_printk("memdev=%s host=%s serial=%lld log=%s : time=%llu uuid=%pUb " \
--
2.34.1
Powered by blists - more mailing lists