lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <202309211954.M7wyhXyv-lkp@intel.com>
Date:   Thu, 21 Sep 2023 19:26:04 +0800
From:   kernel test robot <lkp@...el.com>
To:     Serge Semin <fancer.lancer@...il.com>,
        Michal Simek <monstr@...str.eu>,
        Alexander Stein <alexander.stein@...tq-group.com>,
        Borislav Petkov <bp@...en8.de>,
        Tony Luck <tony.luck@...el.com>,
        James Morse <james.morse@....com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Robert Richter <rric@...nel.org>
Cc:     oe-kbuild-all@...ts.linux.dev, linux-media@...r.kernel.org,
        Serge Semin <fancer.lancer@...il.com>,
        Punnaiah Choudary Kalluri 
        <punnaiah.choudary.kalluri@...inx.com>,
        Dinh Nguyen <dinguyen@...nel.org>,
        Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-arm-kernel@...ts.infradead.org, linux-edac@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 16/20] EDAC/synopsys: Detach Zynq A05 DDRC support to
 separate driver

Hi Serge,

kernel test robot noticed the following build warnings:

[auto build test WARNING on v6.5]
[also build test WARNING on next-20230921]
[cannot apply to linus/master v6.6-rc2 v6.6-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Serge-Semin/EDAC-synopsys-Fix-ECC-status-data-and-IRQ-disable-race-condition/20230921-031420
base:   v6.5
patch link:    https://lore.kernel.org/r/20230920191059.28395-17-fancer.lancer%40gmail.com
patch subject: [PATCH v4 16/20] EDAC/synopsys: Detach Zynq A05 DDRC support to separate driver
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20230921/202309211954.M7wyhXyv-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230921/202309211954.M7wyhXyv-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202309211954.M7wyhXyv-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/edac/zynq_edac.c:194: warning: expecting prototype for handle_error(). Prototype was for zynq_handle_error() instead
>> drivers/edac/zynq_edac.c:233: warning: expecting prototype for check_errors(). Prototype was for zynq_check_errors() instead


vim +194 drivers/edac/zynq_edac.c

   185	
   186	/**
   187	 * handle_error - Handle Correctable and Uncorrectable errors.
   188	 * @mci:	EDAC memory controller instance.
   189	 * @p:		Zynq ECC status structure.
   190	 *
   191	 * Handles ECC correctable and uncorrectable errors.
   192	 */
   193	static void zynq_handle_error(struct mem_ctl_info *mci, struct zynq_ecc_status *p)
 > 194	{
   195		struct zynq_edac_priv *priv = mci->pvt_info;
   196		struct zynq_ecc_error_info *pinf;
   197	
   198		if (p->ce_cnt) {
   199			pinf = &p->ceinfo;
   200	
   201			snprintf(priv->message, ZYNQ_EDAC_MSG_SIZE,
   202				 "Row %d Bank %d Col %d Bit %d Data 0x%08x",
   203				 pinf->row, pinf->bank, pinf->col,
   204				 pinf->bitpos, pinf->data);
   205	
   206			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
   207					     p->ce_cnt, 0, 0, 0, 0, 0, -1,
   208					     priv->message, "");
   209		}
   210	
   211		if (p->ue_cnt) {
   212			pinf = &p->ueinfo;
   213	
   214			snprintf(priv->message, ZYNQ_EDAC_MSG_SIZE,
   215				 "Row %d Bank %d Col %d",
   216				 pinf->row, pinf->bank, pinf->col);
   217	
   218			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
   219					     p->ue_cnt, 0, 0, 0, 0, 0, -1,
   220					     priv->message, "");
   221		}
   222	
   223		memset(p, 0, sizeof(*p));
   224	}
   225	
   226	/**
   227	 * check_errors - Check controller for ECC errors.
   228	 * @mci:	EDAC memory controller instance.
   229	 *
   230	 * Check and post ECC errors. Called by the polling thread.
   231	 */
   232	static void zynq_check_errors(struct mem_ctl_info *mci)
 > 233	{
   234		struct zynq_edac_priv *priv = mci->pvt_info;
   235		int status;
   236	
   237		status = zynq_get_error_info(priv);
   238		if (status)
   239			return;
   240	
   241		zynq_handle_error(mci, &priv->stat);
   242	}
   243	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ