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Message-ID: <87v8c4gja4.fsf@all.your.base.are.belong.to.us>
Date:   Thu, 21 Sep 2023 07:57:55 +0200
From:   Björn Töpel <bjorn@...nel.org>
To:     Charlie Jenkins <charlie@...osinc.com>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org, Andy Chiu <andy.chiu@...ive.com>,
        Greentime Hu <greentime.hu@...ive.com>,
        "Jason A . Donenfeld" <Jason@...c4.com>,
        Samuel Neves <sneves@....uc.pt>,
        Björn Töpel 
        <bjorn@...osinc.com>, Heiko Stuebner <heiko@...ech.de>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        "David S. Miller" <davem@...emloft.net>,
        linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH 6/6] riscv: Add BLAKE2s V implementation

Charlie Jenkins <charlie@...osinc.com> writes:

>> +.macro VROR REG BITS TMPREG
>> +	vmv.v.v		\TMPREG, \REG
>> +	vsrl.vi		\REG, \REG, \BITS
>> +	vsll.vi		\TMPREG, \TMPREG, 32-\BITS
>> +	vor.vv		\REG, \REG, \TMPREG
>> +.endm
>
> This seems like it would be a good candidate to use the Zvkb extension
> that has vector rotate [1]. It would be a pain to use because you need
> two versions of the roundloop, but you could get away with 1 extra
> branch/nop and save 3 instructions per VROR which looks like it happens
> 8*10 times, so 239 fewer instructions.
>
> [1] https://github.com/riscv/riscv-crypto/releases

Indeed! Thanks!


Björn

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