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Message-ID: <4510576.LvFx2qVVIh@z3ntu.xyz>
Date: Fri, 22 Sep 2023 18:43:00 +0200
From: Luca Weiss <luca@...tu.xyz>
To: linux-arm-msm@...r.kernel.org,
~postmarketos/upstreaming@...ts.sr.ht
Cc: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
Matti Lehtimäki <matti.lehtimaki@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Matti Lehtimäki <matti.lehtimaki@...il.com>
Subject: Re: [PATCH 2/2] ARM: qcom: msm8974: Add rpm-master-stats node
On Freitag, 22. September 2023 02:35:33 CEST Matti Lehtimäki wrote:
> Add rpm-master-stats node for MSM8974 and the required RPM MSG RAM
> slices for memory access.
>
> Signed-off-by: Matti Lehtimäki <matti.lehtimaki@...il.com>
Like in the msm8226 patch, also here this appears to match msm8974-v2-pm.dtsi
/ msm8974pro-pm.dtsi from msm-3.4 kernel.
Reviewed-by: Luca Weiss <luca@...tu.xyz>
> ---
> arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 32 ++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index 706fef53767e..0bc2e66d15b1
> 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> @@ -116,6 +116,18 @@ pmu {
> rpm: remoteproc {
> compatible = "qcom,msm8974-rpm-proc", "qcom,rpm-proc";
>
> + master-stats {
> + compatible = "qcom,rpm-master-stats";
> + qcom,rpm-msg-ram = <&apss_master_stats>,
> + <&mpss_master_stats>,
> + <&lpss_master_stats>,
> + <&pronto_master_stats>;
> + qcom,master-names = "APSS",
> + "MPSS",
> + "LPSS",
> + "PRONTO";
> + };
> +
> smd-edge {
> interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> qcom,ipc = <&apcs 8 0>;
> @@ -1067,6 +1079,26 @@ gcc: clock-controller@...00000 {
> rpm_msg_ram: sram@...28000 {
> compatible = "qcom,rpm-msg-ram";
> reg = <0xfc428000 0x4000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0xfc428000 0x4000>;
> +
> + apss_master_stats: sram@150 {
> + reg = <0x150 0x14>;
> + };
> +
> + mpss_master_stats: sram@b50 {
> + reg = <0xb50 0x14>;
> + };
> +
> + lpss_master_stats: sram@...0 {
> + reg = <0x1550 0x14>;
> + };
> +
> + pronto_master_stats: sram@...0 {
> + reg = <0x1f50 0x14>;
> + };
> };
>
> bimc: interconnect@...80000 {
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