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Message-ID: <20230922081026.2799-4-quic_tengfan@quicinc.com>
Date:   Fri, 22 Sep 2023 16:10:23 +0800
From:   Tengfei Fan <quic_tengfan@...cinc.com>
To:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <tglx@...utronix.de>, <maz@...nel.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <catalin.marinas@....com>, <will@...nel.org>
CC:     <geert+renesas@...der.be>, <arnd@...db.de>,
        <neil.armstrong@...aro.org>, <nfraprado@...labora.com>,
        <rafal@...ecki.pl>, <peng.fan@....com>,
        <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <quic_tsoni@...cinc.com>,
        <quic_shashim@...cinc.com>, <quic_kaushalk@...cinc.com>,
        <quic_tdas@...cinc.com>, <quic_tingweiz@...cinc.com>,
        <quic_aiquny@...cinc.com>, <kernel@...cinc.com>,
        Tengfei Fan <quic_tengfan@...cinc.com>,
        Ajit Pandey <quic_ajipan@...cinc.com>
Subject: [PATCH v4 3/6] arm64: dts: qcom: sm4450: Add RPMH and Global clock

Add device node for RPMH and Global clock controller on Qualcomm
SM4450 platform.

Signed-off-by: Ajit Pandey <quic_ajipan@...cinc.com>
Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
---
 arch/arm64/boot/dts/qcom/sm4450.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
index 5e09880f4218..5a8a54b0f6c1 100644
--- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
@@ -3,6 +3,8 @@
  * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
+#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,sm4450-gcc.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -348,6 +350,20 @@
 		dma-ranges = <0 0 0 0 0x10 0>;
 		compatible = "simple-bus";
 
+		gcc: clock-controller@...000 {
+			compatible = "qcom,sm4450-gcc";
+			reg = <0x0 0x00100000 0x0 0x1f4200>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+			clocks = <&rpmhcc RPMH_CXO_CLK>,
+				 <&sleep_clk>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>;
+		};
+
 		tcsr_mutex: hwlock@...0000 {
 			compatible = "qcom,tcsr-mutex";
 			reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -452,6 +468,13 @@
 			apps_bcm_voter: bcm-voter {
 				compatible = "qcom,bcm-voter";
 			};
+
+			rpmhcc: clock-controller {
+				compatible = "qcom,sm4450-rpmh-clk";
+				#clock-cells = <1>;
+				clocks = <&xo_board>;
+				clock-names = "xo";
+			};
 		};
 
 	};
-- 
2.17.1

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