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Message-ID: <20230922084303.4164046-1-quic_gokulsri@quicinc.com>
Date:   Fri, 22 Sep 2023 14:13:00 +0530
From:   Gokul Sriram Palanisamy <quic_gokulsri@...cinc.com>
To:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <mturquette@...libre.com>,
        <sboyd@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <jassisinghbrar@...il.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     <quic_varada@...cinc.com>, <quic_srichara@...cinc.com>,
        <quic_gokulsri@...cinc.com>
Subject: [PATCH v2 0/3] Add APSS clock driver support for IPQ5018

This series adds support for the APSS clock to bump the CPU frequency
above 800MHz. APSS PLL found in the IPQ5018 is of type Stromer. 

- The first patch in the series adds the required a53pll compatible.

- The second patch reuses Stormer Plus PLL offsets, adds configuration values
  for Stromer.

- The third patch adds dts nodes to enable the pll along with the cpu
  operating frequency table.

This series depends on below series
https://patchwork.kernel.org/project/linux-arm-msm/cover/20230913-gpll_cleanup-v2-0-c8ceb1a37680@quicinc.com/

Changes in v2:
- Addressed review comments
- Adds dependency on above mentioned patch series for dropping
  CLK_SET_RATE_PARENT flag from GPLL clocks, GPLL0 clock provider for
  mailbox
- Add CPU operating point at 800MHz based on the review comments.

Gokul Sriram Palanisamy (3):
  dt-bindings: clock: qcom,a53pll: add IPQ5018 compatible
  clk: qcom: apss-ipq-pll: add support for IPQ5018
  arm64: dts: qcom: ipq5018: enable the CPUFreq support

 .../bindings/clock/qcom,a53pll.yaml           |  1 +
 arch/arm64/boot/dts/qcom/ipq5018.dtsi         | 40 +++++++++++++++++++
 drivers/clk/qcom/apss-ipq-pll.c               | 21 ++++++++++
 3 files changed, 62 insertions(+)

-- 
2.34.1

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