lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20230925160543.4q2rjntoxrh27qh6@drivable>
Date:   Mon, 25 Sep 2023 11:05:43 -0500
From:   Nishanth Menon <nm@...com>
To:     "J, KEERTHY" <j-keerthy@...com>
CC:     <robh+dt@...nel.org>, <vigneshr@...com>, <conor+dt@...nel.org>,
        <kristo@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <u-kumar1@...com>, <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the main
 domain watchdog instances

On 21:03-20230925, J, KEERTHY wrote:
> 
> 
> On 9/25/2023 6:49 PM, Nishanth Menon wrote:
> > On 13:43-20230925, Keerthy wrote:
> > > There are totally 2 instances of watchdog module in MCU domain.
> > > 
> > > Signed-off-by: Keerthy <j-keerthy@...com>
> > > ---
> > >   .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     | 20 +++++++++++++++++++
> > >   1 file changed, 20 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> > > index a7b5c4cb7d3e..0b7cc277a567 100644
> > > --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> > > @@ -714,4 +714,24 @@
> > >   		ti,esm-pins = <63>;
> > >   		bootph-pre-ram;
> > >   	};
> > > +
> > > +	mcu_watchdog0: watchdog@...00000 {
> > > +		compatible = "ti,j7-rti-wdt";
> > > +		reg = <0x00 0x40600000 0x00 0x100>;
> > > +		clocks = <&k3_clks 367 1>;
> > > +		power-domains = <&k3_pds 367 TI_SCI_PD_EXCLUSIVE>;
> > > +		assigned-clocks = <&k3_clks 367 0>;
> > > +		assigned-clock-parents = <&k3_clks 367 4>;
> > > +		status = "disabled";
> > > +	};
> > > +
> > > +	mcu_watchdog1: watchdog@...10000 {
> > > +		compatible = "ti,j7-rti-wdt";
> > > +		reg = <0x00 0x40610000 0x00 0x100>;
> > > +		clocks = <&k3_clks 368 1>;
> > > +		power-domains = <&k3_pds 368 TI_SCI_PD_EXCLUSIVE>;
> > > +		assigned-clocks = <&k3_clks 368 0>;
> > > +		assigned-clock-parents = <&k3_clks 368 4>;
> > > +		status = "disabled";
> > 
> > Explain in commit message as to why these are disabled. I believe it is
> > because this RTI instances are tightly coupled to the micro
> > controllers. but that information needs to be documented.
> 
> Sure. I will add that to the commit message.

And inline to code for context, please.
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ