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Message-Id: <20230925204913.3776656-8-Frank.Li@nxp.com>
Date: Mon, 25 Sep 2023 16:49:13 -0400
From: Frank Li <Frank.Li@....com>
To: frank.li@....com, shawnguo@...nel.org
Cc: clin@...e.com, conor+dt@...nel.org, devicetree@...r.kernel.org,
eagle.zhou@....com, festevam@...il.com, imx@...ts.linux.dev,
joy.zou@....com, kernel@...gutronix.de,
krzysztof.kozlowski+dt@...aro.org, leoyang.li@....com,
linux-arm-kernel@...ts.infradead.org, linux-imx@....com,
linux-kernel@...r.kernel.org, pierre.gondois@....com,
robh+dt@...nel.org, s.hauer@...gutronix.de, shenwei.wang@....com,
sherry.sun@....com
Subject: [PATCH v2 7/7] arm64: dts: imx8qm-mek: enable 8qm lpuart2 and lpuart3
Enable uart2 and uart3 for imx8qm-mek board.
Signed-off-by: Frank Li <Frank.Li@....com>
---
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 26 ++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 0b34cc2250e1..6d50838ad17d 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -47,6 +47,18 @@ &lpuart0 {
status = "okay";
};
+&lpuart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart2>;
+ status = "okay";
+};
+
+&lpuart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart3>;
+ status = "okay";
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@@ -118,6 +130,20 @@ IMX8QM_UART0_TX_DMA_UART0_TX 0x06000020
>;
};
+ pinctrl_lpuart2: lpuart2grp {
+ fsl,pins = <
+ IMX8QM_UART0_RTS_B_DMA_UART2_RX 0x06000020
+ IMX8QM_UART0_CTS_B_DMA_UART2_TX 0x06000020
+ >;
+ };
+
+ pinctrl_lpuart3: lpuart3grp {
+ fsl,pins = <
+ IMX8QM_M41_GPIO0_00_DMA_UART3_RX 0x06000020
+ IMX8QM_M41_GPIO0_01_DMA_UART3_TX 0x06000020
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
--
2.34.1
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