linux-kernel - Re: [PATCH v2 4/7] cxl: Fix a checkpatch error

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Message-ID: <20230925110951.000017ff@Huawei.com>
Date:   Mon, 25 Sep 2023 11:09:51 +0100
From:   Jonathan Cameron <Jonathan.Cameron@...wei.com>
To:     Jeongtae Park <jtp.park@...sung.com>
CC:     Dan Williams <dan.j.williams@...el.com>,
        Alison Schofield <alison.schofield@...el.com>,
        Vishal Verma <vishal.l.verma@...el.com>,
        "Ben Widawsky" <bwidawsk@...nel.org>,
        Dave Jiang <dave.jiang@...el.com>,
        Davidlohr Bueso <dave@...olabs.net>,
        Fan Ni <fan.ni@...sung.com>, <linux-cxl@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Kyungsan Kim <ks0204.kim@...sung.com>,
        "Wonjae Lee" <wj28.lee@...sung.com>,
        Hojin Nam <hj96.nam@...sung.com>,
        Junhyeok Im <junhyeok.im@...sung.com>,
        Jehoon Park <jehoon.park@...sung.com>,
        "Jeongtae Park" <jeongtae.park@...il.com>
Subject: Re: [PATCH v2 4/7] cxl: Fix a checkpatch error

On Fri, 22 Sep 2023 20:36:04 +0900
Jeongtae Park <jtp.park@...sung.com> wrote:

> ERROR: Macros with complex values should be enclosed in parentheses
> 
> Signed-off-by: Jeongtae Park <jtp.park@...sung.com>
> Reviewed-by: Dave Jiang <dave.jiang@...el.com>

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>

I checked the places this is used and it won't result in any functional
change so good to tidy it up.



> ---
>  drivers/cxl/cxl.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 76d92561af29..545381355efb 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -142,7 +142,7 @@ static inline int ways_to_eiw(unsigned int ways, u8 *eiw)
>  #define CXL_RAS_HEADER_LOG_OFFSET 0x18
>  #define CXL_RAS_CAPABILITY_LENGTH 0x58
>  #define CXL_HEADERLOG_SIZE SZ_512
> -#define CXL_HEADERLOG_SIZE_U32 SZ_512 / sizeof(u32)
> +#define CXL_HEADERLOG_SIZE_U32 (SZ_512 / sizeof(u32))
>  
>  /* CXL 2.0 8.2.8.1 Device Capabilities Array Register */
>  #define CXLDEV_CAP_ARRAY_OFFSET 0x0