Date:   Tue, 26 Sep 2023 18:29:07 +0800
From:   Chen Wang <unicornxw@...il.com>
To:     Palmer Dabbelt <palmer@...belt.com>
Cc:     aou@...s.berkeley.edu, chao.wei@...hgo.com,
        Conor Dooley <conor@...nel.org>, devicetree@...r.kernel.org,
        emil.renner.berthing@...onical.com, guoren@...nel.org,
        jszhang@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        Paul Walmsley <paul.walmsley@...ive.com>, robh+dt@...nel.org,
        xiaoguang.xing@...hgo.com, wangchen20@...as.ac.cn
Subject: Re: [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support

Palmer Dabbelt <palmer@...belt.com> 于2023年9月20日周三 23:22写道：
>
> On Tue, 19 Sep 2023 23:33:48 PDT (-0700), unicornxw@...il.com wrote:
> > Milk-V Pioneer [1] is a developer motherboard based on SOPHON SG2042 [2]
> > in a standard mATX form factor. Add minimal device
> > tree files for the SG2042 SOC and the Milk-V Pioneer board.
> >
> > Now only support basic uart drivers to boot up into a basic console.
> >
> > Thanks,
> > Chen
> >
> > ---
> >
> > Changes in v2:
> >   The patch series is based on v6.6-rc1. You can simply review or test
> >   the patches at the link [4].
> >   - Improve format for comment of commitments as per input from last review.
> >   - Improve format of DTS as per input from last review.
> >   - Remove numa related stuff from DTS. This part is just for optimization, may
> >     add it later if really needed.
> >
> > Previous versions:
> > v1: due to it is not sent in thread, I have listed permlinks of the patchset
> >     [v1-0/12] ~ [v1-12/12] here for quick reference. You can simply review or
> >     test the patches at the link [3].
> >
> > [1]: https://milkv.io/pioneer
> > [2]: https://en.sophgo.com/product/introduce/sg2042.html
> > [3]: https://github.com/unicornx/linux-riscv/commits/milkv-pioneer-minimal
> > [4]: https://github.com/unicornx/linux-riscv/commits/milkv-pioneer-minimal-v2
> > [v1-0/12]:https://lore.kernel.org/linux-riscv/20230915070856.117514-1-wangchen20@iscas.ac.cn/
> > [v1-1/12]:https://lore.kernel.org/linux-riscv/20230915071005.117575-1-wangchen20@iscas.ac.cn/
> > [v1-2/12]:https://lore.kernel.org/linux-riscv/20230915071409.117692-1-wangchen20@iscas.ac.cn/
> > [v1-3/12]:https://lore.kernel.org/linux-riscv/20230915072242.117935-1-wangchen20@iscas.ac.cn/
> > [v1-4/12]:https://lore.kernel.org/linux-riscv/20230915072333.117991-1-wangchen20@iscas.ac.cn/
> > [v1-5/12]:https://lore.kernel.org/linux-riscv/20230915072358.118045-1-wangchen20@iscas.ac.cn/
> > [v1-6/12]:https://lore.kernel.org/linux-riscv/20230915072415.118100-1-wangchen20@iscas.ac.cn/
> > [v1-7/12]:https://lore.kernel.org/linux-riscv/20230915072431.118154-1-wangchen20@iscas.ac.cn/
> > [v1-8/12]:https://lore.kernel.org/linux-riscv/20230915072451.118209-1-wangchen20@iscas.ac.cn/
> > [v1-9/12]:https://lore.kernel.org/linux-riscv/20230915072517.118266-1-wangchen20@iscas.ac.cn/
> > [v1-10/12]:https://lore.kernel.org/linux-riscv/20230915072558.118325-1-wangchen20@iscas.ac.cn/
> > [v1-11/12]:https://lore.kernel.org/linux-riscv/20230915072624.118388-1-wangchen20@iscas.ac.cn/
> > [v1-12/12]:https://lore.kernel.org/linux-riscv/20230915072653.118448-1-wangchen20@iscas.ac.cn/
> >
> > ---
> >
> > Chen Wang (8):
> >   riscv: Add SOPHGO SOC family Kconfig support
> >   dt-bindings: vendor-prefixes: add milkv/sophgo
> >   dt-bindings: riscv: add sophgo sg2042 bindings
> >   dt-bindings: riscv: Add T-HEAD C920 compatibles
> >   dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC
> >   riscv: dts: add initial SOPHGO SG2042 SoC device tree
> >   riscv: dts: sophgo: add Milk-V Pioneer board device tree
> >   riscv: defconfig: enable SOPHGO SoC
> >
> > Emil Renner Berthing (2):
> >   dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts
> >   serial: 8250_dw: Add Sophgo SG2042 support
> >
> > Inochi Amaoto (1):
> >   dt-bindings: timer: Add Sophgo sg2042 clint
> >
> >  .../sifive,plic-1.0.0.yaml                    |    1 +
> >  .../devicetree/bindings/riscv/cpus.yaml       |    1 +
> >  .../devicetree/bindings/riscv/sophgo.yaml     |   28 +
> >  .../bindings/serial/snps-dw-apb-uart.yaml     |    1 +
> >  .../bindings/timer/sifive,clint.yaml          |    8 +
> >  .../devicetree/bindings/vendor-prefixes.yaml  |    4 +
> >  MAINTAINERS                                   |    7 +
> >  arch/riscv/Kconfig.socs                       |    5 +
> >  arch/riscv/boot/dts/Makefile                  |    1 +
> >  arch/riscv/boot/dts/sophgo/Makefile           |    3 +
> >  arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi   | 1744 +++++++++++++++++
> >  .../boot/dts/sophgo/sg2042-milkv-pioneer.dts  |   19 +
> >  arch/riscv/boot/dts/sophgo/sg2042.dtsi        |  439 +++++
> >  arch/riscv/configs/defconfig                  |    1 +
> >  drivers/tty/serial/8250/8250_dw.c             |    5 +-
> >  15 files changed, 2265 insertions(+), 2 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/riscv/sophgo.yaml
> >  create mode 100644 arch/riscv/boot/dts/sophgo/Makefile
> >  create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
> >  create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> >  create mode 100644 arch/riscv/boot/dts/sophgo/sg2042.dtsi
>
> Given this is the first sg2042 and it appears to have a few errata (the
> FP rounding issues and the special fence for starvation), I think we
> want to make sure we figure out how to provide that information to
> userspace.
>

Hi, Palmer,
I don't  understand well what's your meaning of "provide that
information to userspace", can you please clarify more?
And for this patchset, do we still lack something else? This patchset
is the first one for sg2042, but I don't see those issues you
mentioned would block it, becasue the target of this first patchset we
just want to make sure the kernel can boot up and work with a uart
console.

Thanks in adv.
Chen


> > base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d

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