linux-kernel - Re: [PATCH v2 1/4] x86/resctrl: Enable non-contiguous bits in Intel CAT

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Message-ID: <ZRRENutFOc6n/rlg@agluck-desk3>
Date:   Wed, 27 Sep 2023 08:03:18 -0700
From:   Tony Luck <tony.luck@...el.com>
To:     Maciej Wieczór-Retman 
        <maciej.wieczor-retman@...el.com>
Cc:     Peter Newman <peternewman@...gle.com>, bp@...en8.de,
        dave.hansen@...ux.intel.com, fenghua.yu@...el.com, hpa@...or.com,
        linux-kernel@...r.kernel.org, mingo@...hat.com,
        reinette.chatre@...el.com, tglx@...utronix.de, eranian@...gle.com,
        x86@...nel.org
Subject: Re: [PATCH v2 1/4] x86/resctrl: Enable non-contiguous bits in Intel
 CAT

On Wed, Sep 27, 2023 at 12:44:39PM +0200, Maciej Wieczór-Retman wrote:
> Writing non-contiguous bitmasks is supported starting from the upcoming
> GNR microarchitecture forward.
> 
> That's also why the new CPUID bit meaning is in the ISA pdf and not in
> the SDM one currently.

New SDM released today has the non-contiguous bit. See vol 3B Figuer
18-33.

-Tony