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Message-ID: <75897feec12e34c5a2acb550a55f4de10437aa1b.camel@mediatek.com>
Date: Wed, 27 Sep 2023 02:52:16 +0000
From: Moudy Ho (何宗原) <Moudy.Ho@...iatek.com>
To: "robh+dt@...nel.org" <robh+dt@...nel.org>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
"mchehab@...nel.org" <mchehab@...nel.org>,
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CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org"
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<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v6 10/16] dt-bindings: media: mediatek: mdp3: add
component TDSHP for MT8195
On Sat, 2023-09-23 at 19:34 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 22/09/2023 09:21, Moudy Ho wrote:
> > Add the fundamental hardware configuration of component TDSHP,
> > which is controlled by MDP3 on MT8195.
> >
> > Signed-off-by: Moudy Ho <moudy.ho@...iatek.com>
> > ---
> > .../bindings/media/mediatek,mdp3-tdshp.yaml | 61
> +++++++++++++++++++
> > 1 file changed, 61 insertions(+)
> > create mode 100644
> Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-
> tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-
> tdshp.yaml
> > new file mode 100644
> > index 000000000000..0ac904cbc2c0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-
> tdshp.yaml
> > @@ -0,0 +1,61 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek Media Data Path 3 TDSHP
> > +
> > +maintainers:
> > + - Matthias Brugger <matthias.bgg@...il.com>
> > + - Moudy Ho <moudy.ho@...iatek.com>
> > +
> > +description:
> > + One of Media Data Path 3 (MDP3) components used to improve image
> > + sharpness and contrast.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - mediatek,mt8195-mdp3-tdshp
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + mediatek,gce-client-reg:
> > + description:
> > + The register of display function block to be set by gce.
> There are 4 arguments,
> > + such as gce node, subsys id, offset and register size. The
> subsys id that is
> > + mapping to the register of display function blocks is
> defined in the gce header
> > + include/dt-bindings/gce/<chip>-gce.h of each chips.
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + items:
> > + items:
> > + - description: phandle of GCE
> > + - description: GCE subsys id
> > + - description: register offset
> > + - description: register size
> > + maxItems: 1
> > +
> > + clocks:
> > + minItems: 1
>
> NAK. So you ignored all the review. Brilliant.
>
> I am getting fed up with Mediatek's approach. It's not the first
> time.
>
> Best regards,
> Krzysztof
>
Hi Krzysztof,
I apologize sincerely for overlooking despite your multiple reminders.
To prevent similar incidents, I will ensure a thorough scrutiny of
everything in question. I genuinely appreciate your patient review and
deeply regret any inconvenience this may have caused you.
Sincerely,
Moudy
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