linux-kernel - Re: [PATCH 1/4] arm64: dts: qcom: sm6375: Add UART1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <7f4f3e06-af20-4276-bcb9-6ad7acbf9c35@linaro.org>
Date:   Wed, 27 Sep 2023 11:59:47 +0100
From:   Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc:     Marijn Suijten <marijn.suijten@...ainline.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/4] arm64: dts: qcom: sm6375: Add UART1

On 27/09/2023 10:21, Konrad Dybcio wrote:
> Add UART1 node, generally used for the Bluetooth module.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> ---
>   arch/arm64/boot/dts/qcom/sm6375.dtsi | 43 ++++++++++++++++++++++++++++++++++++
>   1 file changed, 43 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi
> index e7ff55443da7..2fba0e7ea4e6 100644
> --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi
> @@ -896,6 +896,36 @@ qup_spi0_default: qup-spi0-default-state {
>   				drive-strength = <6>;
>   				bias-disable;
>   			};
> +
> +			qup_uart1_default: qup-uart1-default-state {
> +				cts-pins {
> +					pins = "gpio61";
> +					function = "qup01";
> +					drive-strength = <2>;
> +					bias-pull-down;
> +				};

Any particular reason you are doing bias-pull-down here instead of

bias-disable ?

> +
> +				rts-pins {
> +					pins = "gpio62";
> +					function = "qup01";
> +					drive-strength = <2>;
> +					bias-disable;
> +				};
> +
> +				tx-pins {
> +					pins = "gpio63";
> +					function = "qup01";
> +					drive-strength = <2>;
> +					bias-disable;
> +				};
> +
> +				rx-pins {
> +					pins = "gpio64";
> +					function = "qup01";
> +					drive-strength = <2>;
> +					bias-pull-up;
> +				};
> +			};
>   		};
>   
>   		gcc: clock-controller@...0000 {
> @@ -1111,6 +1141,19 @@ spi1: spi@...4000 {
>   				status = "disabled";
>   			};
>   
> +			uart1: serial@...4000 {
> +				compatible = "qcom,geni-uart";
> +				reg = <0x0 0x04a84000 0x0 0x4000>;
> +				interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
> +				clock-names = "se";
> +				power-domains = <&rpmpd SM6375_VDDCX>;
> +				operating-points-v2 = <&qup_opp_table>;
> +				pinctrl-0 = <&qup_uart1_default>;
> +				pinctrl-names = "default";
> +				status = "disabled";
> +			};
> +
>   			i2c2: i2c@...8000 {
>   				compatible = "qcom,geni-i2c";
>   				reg = <0x0 0x04a88000 0x0 0x4000>;
> 

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>