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Message-ID: <314cee42-c235-4d2a-b4a6-4da92d2c1548@xs4all.nl>
Date: Wed, 27 Sep 2023 14:05:03 +0200
From: Hans Verkuil <hverkuil@...all.nl>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-media@...r.kernel.org,
laurent.pinchart@...asonboard.com, rfoss@...nel.org,
todor.too@...il.com, agross@...nel.org, andersson@...nel.org,
konrad.dybcio@...aro.org, mchehab@...nel.org,
sakari.ailus@...ux.intel.com, andrey.konovalov@...aro.org
Cc: linux-kernel@...r.kernel.org
Subject: Re: [RESEND PATCH v6 17/17] media: qcom: camss: Comment CSID dt_id
field
On 27/09/2023 14:03, Bryan O'Donoghue wrote:
> On 27/09/2023 12:42, Hans Verkuil wrote:
>>> + /*
>>> + * DT_ID is a two bit bitfield that is concatenated with
>>> + * the four least significant bits of the six bit VC
>>> + * bitfield to generate an internal CID value.
>>> + *
>>> + * CSID_RDI_CFG0(vc)
>>> + * DT_ID : 28:27
>>> + * VC : 26:22
>> This is 5 bits, not 6 bits as the comment above says. Which is right?
>
> Yes you're right I had "DT" which is six bits in my head when I wrote this. The VC bitfield is five.
>
>>
>>> + * DT : 21:16
>>> + *
>>> + * CID : VC 3:0 << 2 | DT_ID 1:0
>>> + */
>>> u8 dt_id = vc;
>> So if dt_id is 2 bits, and vc can be more than 2 bits in the future,
>> shouldn't this read "vc & 3"?
>
> Hmm...
>
> val |= dt_id << RDI_CFG0_DT_ID;
>
> yes that would overrun otherwise.
No need to repost the whole series, just post a v6.1 for this patch only.
Regards,
Hans
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