[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230927125850.GA19623@thinkpad>
Date: Wed, 27 Sep 2023 14:58:50 +0200
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>
Cc: Abel Vesa <abel.vesa@...aro.org>, lpieralisi@...nel.org,
kw@...ux.com, andersson@...nel.org, bhelgaas@...gle.com,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: qcom: Add interconnect bandwidth for PCIe Gen4
On Mon, Sep 25, 2023 at 12:40:34PM +0200, Konrad Dybcio wrote:
> On 25.09.2023 12:37, Abel Vesa wrote:
> > On 23-09-25 12:34:53, Konrad Dybcio wrote:
> >> On 25.09.2023 12:33, Abel Vesa wrote:
> >>> On 23-09-25 10:57:47, Konrad Dybcio wrote:
> >>>> On 24.09.2023 18:07, Manivannan Sadhasivam wrote:
> >>>>> PCIe Gen4 supports the interconnect bandwidth of 1969 MBps. So let's add
> >>>>> the bandwidth support in the driver. Otherwise, the default bandwidth of
> >>>>> 985 MBps will be used.
> >>>>>
> >>>>> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> >>>>> ---
> >>>>> drivers/pci/controller/dwc/pcie-qcom.c | 7 +++++--
> >>>>> 1 file changed, 5 insertions(+), 2 deletions(-)
> >>>>>
> >>>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> >>>>> index 297442c969b6..6853123f92c1 100644
> >>>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> >>>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> >>>>> @@ -1384,11 +1384,14 @@ static void qcom_pcie_icc_update(struct qcom_pcie *pcie)
> >>>>> case 2:
> >>>>> bw = MBps_to_icc(500);
> >>>>> break;
> >>>>> + case 3:
> >>>>> + bw = MBps_to_icc(985);
> >>>>> + break;
> >>>>> default:
> >>>>> WARN_ON_ONCE(1);
> >>>>> fallthrough;
> >>>>> - case 3:
> >>>>> - bw = MBps_to_icc(985);
> >>>>> + case 4:
> >>>>> + bw = MBps_to_icc(1969);
> >>>>> break;
> >>>> Are you adding case 4 under `default`? That looks.. bizzare..
> >>>
> >>> That's intentional. You want it to use 1969MBps if there is a different
> >>> gen value. AFAIU.
> >> Gah right, then the commit message is wrong.
> >
> > Yep, should be: "Otherwise, the default bandwidth of 1969 MBps will be
> > used."
> >
> > But maybe we should not default to that. Maybe we should still default
> > to 985 MBps.
> Perhaps we shouldn't have a default at all..
>
> E.g. if the gen5 bus may get clogged if we exceed gen4
> limits
>
So the idea here is that if we happen to run this driver on a new Gen supported
SoC, we have to let the user know that the interconnects are running at a lower
gen speed and it needs attention.
But I think we can simplify it by fixing a default bandwidth, say Gen3 and get
rid of the fallthrough. And yeah, the same needs to be done for the pcie-qcom-ep
driver as well.
- Mani
> Konrad
--
மணிவண்ணன் சதாசிவம்
Powered by blists - more mailing lists