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Message-ID: <d913ce854c9951c3393dda13b91e210a994893ad.camel@mediatek.com>
Date: Thu, 28 Sep 2023 01:26:35 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: Shawn Sung (宋孝謙)
<Shawn.Sung@...iatek.com>,
"matthias.bgg@...il.com" <matthias.bgg@...il.com>,
"angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>,
Singo Chang (張興國)
<Singo.Chang@...iatek.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Jason-JH Lin (林睿祥)
<Jason-JH.Lin@...iatek.com>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
"daniel@...ll.ch" <daniel@...ll.ch>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
"airlied@...il.com" <airlied@...il.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"nfraprado@...labora.com" <nfraprado@...labora.com>
Subject: Re: [RESEND PATCH v6 15/20] drm/mediatek: Manage component's clock
with function pointers
Hi, Hsiao-chien:
On Mon, 2023-09-11 at 15:42 +0800, Hsiao Chien Sung wrote:
> By registering component related functions to the pointers,
> we can easily manage them within a for-loop and simplify the
> logic of clock control significantly.
Reviewed-by: CK Hu <ck.hu@...iatek.com>
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@...iatek.com>
> ---
> .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 111 +++++++---------
> --
> 1 file changed, 44 insertions(+), 67 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> index 8a52d1301e04..84133303a6ec 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> @@ -54,6 +54,7 @@ struct ovl_adaptor_comp_match {
> enum mtk_ovl_adaptor_comp_type type;
> enum mtk_ddp_comp_id comp_id;
> int alias_id;
> + const struct mtk_ddp_comp_funcs *funcs;
> };
>
> struct mtk_disp_ovl_adaptor {
> @@ -68,20 +69,35 @@ static const char * const
> private_comp_stem[OVL_ADAPTOR_TYPE_NUM] = {
> [OVL_ADAPTOR_TYPE_MERGE] = "merge",
> };
>
> +static const struct mtk_ddp_comp_funcs _ethdr = {
> + .clk_enable = mtk_ethdr_clk_enable,
> + .clk_disable = mtk_ethdr_clk_disable,
> +};
> +
> +static const struct mtk_ddp_comp_funcs _merge = {
> + .clk_enable = mtk_merge_clk_enable,
> + .clk_disable = mtk_merge_clk_disable,
> +};
> +
> +static const struct mtk_ddp_comp_funcs _rdma = {
> + .clk_enable = mtk_mdp_rdma_clk_enable,
> + .clk_disable = mtk_mdp_rdma_clk_disable,
> +};
> +
> static const struct ovl_adaptor_comp_match
> comp_matches[OVL_ADAPTOR_ID_MAX] = {
> - [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR,
> DDP_COMPONENT_ETHDR_MIXER, 0 },
> - [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA0, 0 },
> - [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA1, 1 },
> - [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA2, 2 },
> - [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA3, 3 },
> - [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA4, 4 },
> - [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA5, 5 },
> - [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA6, 6 },
> - [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA7, 7 },
> - [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE1, 1 },
> - [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE2, 2 },
> - [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE3, 3 },
> - [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE4, 4 },
> + [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR,
> DDP_COMPONENT_ETHDR_MIXER, 0, &_ethdr },
> + [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA0, 0, &_rdma },
> + [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA1, 1, &_rdma },
> + [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA2, 2, &_rdma },
> + [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA3, 3, &_rdma },
> + [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA4, 4, &_rdma },
> + [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA5, 5, &_rdma },
> + [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA6, 6, &_rdma },
> + [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA7, 7, &_rdma },
> + [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE1, 1, &_merge },
> + [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE2, 2, &_merge },
> + [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE3, 3, &_merge },
> + [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE4, 4, &_merge },
> };
>
> void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int
> idx,
> @@ -187,73 +203,34 @@ void mtk_ovl_adaptor_stop(struct device *dev)
>
> int mtk_ovl_adaptor_clk_enable(struct device *dev)
> {
> - struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
> - struct device *comp;
> - int ret;
> int i;
> -
> - for (i = 0; i < OVL_ADAPTOR_MERGE0; i++) {
> - comp = ovl_adaptor->ovl_adaptor_comp[i];
> - ret = pm_runtime_get_sync(comp);
> - if (ret < 0) {
> - dev_err(dev, "Failed to enable power domain %d,
> err %d\n", i, ret);
> - goto pwr_err;
> - }
> - }
> + int ret;
> + struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
>
> for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
> - comp = ovl_adaptor->ovl_adaptor_comp[i];
> -
> - if (i < OVL_ADAPTOR_MERGE0)
> - ret = mtk_mdp_rdma_clk_enable(comp);
> - else if (i < OVL_ADAPTOR_ETHDR0)
> - ret = mtk_merge_clk_enable(comp);
> - else
> - ret = mtk_ethdr_clk_enable(comp);
> + dev = ovl_adaptor->ovl_adaptor_comp[i];
> + if (!dev)
> + continue;
> + ret = comp_matches[i].funcs->clk_enable(dev);
> if (ret) {
> - dev_err(dev, "Failed to enable clock %d, err
> %d\n", i, ret);
> - goto clk_err;
> + while (--i >= 0)
> + comp_matches[i].funcs-
> >clk_disable(dev);
> + return ret;
> }
> }
> -
> - return ret;
> -
> -clk_err:
> - while (--i >= 0) {
> - comp = ovl_adaptor->ovl_adaptor_comp[i];
> - if (i < OVL_ADAPTOR_MERGE0)
> - mtk_mdp_rdma_clk_disable(comp);
> - else if (i < OVL_ADAPTOR_ETHDR0)
> - mtk_merge_clk_disable(comp);
> - else
> - mtk_ethdr_clk_disable(comp);
> - }
> - i = OVL_ADAPTOR_MERGE0;
> -
> -pwr_err:
> - while (--i >= 0)
> - pm_runtime_put(ovl_adaptor->ovl_adaptor_comp[i]);
> -
> - return ret;
> + return 0;
> }
>
> void mtk_ovl_adaptor_clk_disable(struct device *dev)
> {
> - struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
> - struct device *comp;
> int i;
> + struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
>
> for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
> - comp = ovl_adaptor->ovl_adaptor_comp[i];
> -
> - if (i < OVL_ADAPTOR_MERGE0) {
> - mtk_mdp_rdma_clk_disable(comp);
> - pm_runtime_put(comp);
> - } else if (i < OVL_ADAPTOR_ETHDR0) {
> - mtk_merge_clk_disable(comp);
> - } else {
> - mtk_ethdr_clk_disable(comp);
> - }
> + dev = ovl_adaptor->ovl_adaptor_comp[i];
> + if (!dev)
> + continue;
> + comp_matches[i].funcs->clk_disable(dev);
> }
> }
>
> --
> 2.18.0
>
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