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Message-ID: <9e5ad332-2c04-4024-8321-3a9c66586b64@linaro.org>
Date: Fri, 29 Sep 2023 14:56:25 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Praveenkumar I <quic_ipkumar@...cinc.com>, agross@...nel.org,
andersson@...nel.org, vkoul@...nel.org, kishon@...nel.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, gregkh@...uxfoundation.org,
catalin.marinas@....com, will@...nel.org, p.zabel@...gutronix.de,
geert+renesas@...der.be, arnd@...db.de, neil.armstrong@...aro.org,
nfraprado@...labora.com, u-kumar1@...com, peng.fan@....com,
quic_wcheng@...cinc.com, quic_varada@...cinc.com,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-usb@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: quic_kathirav@...cinc.com, quic_nsekar@...cinc.com,
quic_srichara@...cinc.com
Subject: Re: [PATCH 3/8] arm64: dts: qcom: ipq5332: Add USB Super-Speed PHY
node
On 29.09.2023 10:42, Praveenkumar I wrote:
> Add USB Super-Speed UNIPHY node and populate the phandle on
> gcc node for the parent clock map.
>
> Signed-off-by: Praveenkumar I <quic_ipkumar@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 25 ++++++++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> index d3fef2f80a81..b08ffd8c094e 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> @@ -158,6 +158,29 @@ usbphy0: phy@...00 {
> status = "disabled";
> };
>
> + usbphy1: phy@...000 {
> + compatible = "qcom,ipq5332-usb-uniphy";
> + reg = <0x4b0000 0x800>;
Please pad the address part to 8 hex digits with leading zeroes.
> +
> + clocks = <&gcc GCC_PCIE3X1_PHY_AHB_CLK>,
> + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
> + <&gcc GCC_USB0_PIPE_CLK>;
> + clock-names = "ahb",
> + "cfg_ahb",
> + "pipe";
> +
> + resets = <&gcc GCC_USB0_PHY_BCR>;
Looks like there's a double space after '='
Konrad
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