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Message-ID: <1b5bd391-4bb0-44ac-88d1-e326bec4dd7d@nexus-software.ie>
Date: Fri, 29 Sep 2023 15:15:11 +0100
From: Bryan O'Donoghue <pure.logic@...us-software.ie>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
Luca Weiss <luca.weiss@...rphone.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Loic Poulain <loic.poulain@...aro.org>,
Robert Foss <rfoss@...nel.org>,
Andi Shyti <andi.shyti@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
cros-qcom-dts-watchers@...omium.org,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Cc: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
linux-i2c@...r.kernel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sc7280: Add Camera Control
Interface busses
On 29/09/2023 14:35, Konrad Dybcio wrote:
>
>
> On 9/29/23 10:01, Luca Weiss wrote:
>> Add the CCI busses found on sc7280 and their pinctrl states.
>>
>> Signed-off-by: Luca Weiss <luca.weiss@...rphone.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 136
>> +++++++++++++++++++++++++++++++++++
>> 1 file changed, 136 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 66f1eb83cca7..65550de2e4ff 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -3793,6 +3793,86 @@ videocc: clock-controller@...0000 {
>> #power-domain-cells = <1>;
>> };
>> + cci0: cci@...a000 {
>> + compatible = "qcom,sc7280-cci", "qcom,msm8996-cci";
>> + reg = <0 0x0ac4a000 0 0x1000>;
>> + interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
>> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
>> +
>> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
>> + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
>> + <&camcc CAM_CC_CPAS_AHB_CLK>,
>> + <&camcc CAM_CC_CCI_0_CLK>,
>> + <&camcc CAM_CC_CCI_0_CLK_SRC>;
>> + clock-names = "camnoc_axi",
>> + "slow_ahb_src",
>> + "cpas_ahb",
>> + "cci",
>> + "cci_src";
> I guess this is more of a question to e.g. Bryan, but are all of these
> clocks actually necessary?
>
> Konrad
Hmm its a good question, we generally take the approach of adopting all
of the downstream clocks for these camera interfaces verbatim.
The clock plan for this part only calls out cci_X_clk and cci_x_clk_src
for the CCI however we know that to be incomplete since we *absolutely*
need to have the AXI for the block clocked to access those registers,
same deal with the AHB bus.
AXI: registers
AHB: data
In the above list the only clock you might conceivably not need is
CPAS_AHB_CLK.
Let me zap that clock from sdm845 since I have an rb3 right in front of
me and see what happens.
Crash and reset
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4402,13 +4402,11 @@ cci: cci@...a000 {
clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
- <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CCI_CLK>,
<&clock_camcc CAM_CC_CCI_CLK_SRC>;
clock-names = "camnoc_axi",
"soc_ahb",
"slow_ahb_src",
- "cpas_ahb",
"cci",
"cci_src";
I think the list is good tbh
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
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