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Message-ID: <ac2ec634-4666-cfe2-49d5-2cbda5a4412a@linux.intel.com>
Date: Fri, 29 Sep 2023 17:36:44 +0300 (EEST)
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: Maciej Wieczor-Retman <maciej.wieczor-retman@...el.com>
cc: Fenghua Yu <fenghua.yu@...el.com>,
Reinette Chatre <reinette.chatre@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
Peter Newman <peternewman@...gle.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 1/4] x86/resctrl: Rename arch_has_sparse_bitmaps
On Fri, 29 Sep 2023, Maciej Wieczor-Retman wrote:
> A later patch exposes the value of arch_has_sparse_bitmaps to
> user space via the existing term of a bitmask. Rename
> arch_has_sparse_bitmaps to arch_has_sparse_bitmasks to ensure
> consistent terminology throughout resctrl.
>
> Suggested-by: Reinette Chatre <reinette.chatre@...el.com>
> Reviewed-by: Peter Newman <peternewman@...gle.com>
> Tested-by: Peter Newman <peternewman@...gle.com>
> Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@...el.com>
> ---
> Changelog v3:
> - Add Peter's tested-by and reviewed-by tags.
> - Make this patch first in the series. (Reinette)
> - Change the patch message. (Reinette)
> - Drop rmid_busy_llc comment name change. (Reinette)
>
> Changelog v2:
> - Create this patch.
>
> arch/x86/kernel/cpu/resctrl/core.c | 4 ++--
> arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 4 ++--
> include/linux/resctrl.h | 4 ++--
> 3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 030d3b409768..c09e4fdded3c 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -872,7 +872,7 @@ static __init void rdt_init_res_defs_intel(void)
>
> if (r->rid == RDT_RESOURCE_L3 ||
> r->rid == RDT_RESOURCE_L2) {
> - r->cache.arch_has_sparse_bitmaps = false;
> + r->cache.arch_has_sparse_bitmasks = false;
> r->cache.arch_has_per_cpu_cfg = false;
> r->cache.min_cbm_bits = 1;
> } else if (r->rid == RDT_RESOURCE_MBA) {
> @@ -892,7 +892,7 @@ static __init void rdt_init_res_defs_amd(void)
>
> if (r->rid == RDT_RESOURCE_L3 ||
> r->rid == RDT_RESOURCE_L2) {
> - r->cache.arch_has_sparse_bitmaps = true;
> + r->cache.arch_has_sparse_bitmasks = true;
> r->cache.arch_has_per_cpu_cfg = true;
> r->cache.min_cbm_bits = 0;
> } else if (r->rid == RDT_RESOURCE_MBA) {
> diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> index b44c487727d4..ab45012288bb 100644
> --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> @@ -113,8 +113,8 @@ static bool cbm_validate(char *buf, u32 *data, struct rdt_resource *r)
> first_bit = find_first_bit(&val, cbm_len);
> zero_bit = find_next_zero_bit(&val, cbm_len, first_bit);
>
> - /* Are non-contiguous bitmaps allowed? */
> - if (!r->cache.arch_has_sparse_bitmaps &&
> + /* Are non-contiguous bitmasks allowed? */
> + if (!r->cache.arch_has_sparse_bitmasks &&
> (find_next_bit(&val, cbm_len, zero_bit) < cbm_len)) {
> rdt_last_cmd_printf("The mask %lx has non-consecutive 1-bits\n", val);
> return false;
> diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
> index 8334eeacfec5..66942d7fba7f 100644
> --- a/include/linux/resctrl.h
> +++ b/include/linux/resctrl.h
> @@ -94,7 +94,7 @@ struct rdt_domain {
> * zero CBM.
> * @shareable_bits: Bitmask of shareable resource with other
> * executing entities
> - * @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid.
> + * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid.
> * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
> * level has CPU scope.
> */
> @@ -102,7 +102,7 @@ struct resctrl_cache {
> unsigned int cbm_len;
> unsigned int min_cbm_bits;
> unsigned int shareable_bits;
> - bool arch_has_sparse_bitmaps;
> + bool arch_has_sparse_bitmasks;
> bool arch_has_per_cpu_cfg;
> };
>
>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
--
i.
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