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Message-Id: <20230930-unmoral-mutiny-e3f91c0dfee9@spud>
Date: Sat, 30 Sep 2023 09:59:36 +0100
From: Conor Dooley <conor@...nel.org>
To: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-mmc@...r.kernel.org,
William Qiu <william.qiu@...rfivetech.com>
Cc: conor@...nel.org, Conor Dooley <conor.dooley@...rochip.com>,
Emil Renner Berthing <kernel@...il.dk>,
Rob Herring <robh+dt@...nel.org>,
Jaehoon Chung <jh80.chung@...sung.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>
Subject: Re: (subset) [PATCH v3 0/3] Change tuning implementation
From: Conor Dooley <conor.dooley@...rochip.com>
On Fri, 22 Sep 2023 14:28:31 +0800, William Qiu wrote:
> This series of patches changes the tuning implementation, from the
> previous way of reading and writing system controller registers to
> reading and writing UHS_REG_EXT register, thus optimizing the tuning
> of obtaining delay-chain.
>
> Changes v2->v3:
> - Rebased to v6.6rc2.
> - Dropped redundant criteria.
> - Keeped "starfive,sysreg" in dts file.
>
> [...]
Applied to riscv-dt-for-next, thanks!
[3/3] riscv: dts: starfive: add assigned-clock* to limit frquency
https://git.kernel.org/conor/c/af571133f7ae
Thanks,
Conor.
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