linux-kernel - Re: [PATCH RESEND v5 7/8] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte

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Message-ID: <CACRpkdYOLjZ2thKdR7JoYxa2gr078AHO6JXu76fUU+dBzG7MPQ@mail.gmail.com>
Date:   Sat, 30 Sep 2023 17:37:19 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Duje Mihanović <duje.mihanovic@...le.hr>,
        Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc:     Robert Jarzmik <robert.jarzmik@...e.fr>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Andy Shevchenko <andy@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Lubomir Rintel <lkundrak@...sk>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Kees Cook <keescook@...omium.org>,
        Tony Luck <tony.luck@...el.com>,
        "Guilherme G. Piccoli" <gpiccoli@...lia.com>,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-hardening@...r.kernel.org,
        ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
        afaerber@...e.de, balejk@...fyz.cz
Subject: Re: [PATCH RESEND v5 7/8] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte

On Sat, Sep 30, 2023 at 10:25 AM Duje Mihanović <duje.mihanovic@...le.hr> wrote:
> On Saturday, September 30, 2023 12:05:41 AM CEST Linus Walleij wrote:
> > But it exists, so I can't say you can't use it. Not my choice.
> > I understand it is convenient.
> >
> > It is possible to switch later, but only if you have a unique
> > pin controller compatible so please add that.
>
> Maybe a dumb question. I might want to do this at some point to clean up the
> device tree a bit, are there any such pinctrl drivers I can use as a
> reference?

Since it's Marvell after all (albeit a descendant of the 20 yo
PXA platform!) I would expect new Marvell SoCs to be more alike
the AC5 bindings that Chris Packham merged only last year:
Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
Driver:
drivers/pinctrl/mvebu/pinctrl-armada-xp.c
drivers/pinctrl/mvebu/pinctrl-mvebu.c

But if this pin controller is more related to PXA (Intel) hardware
than to either Kirkwood or Armada, you might want to do something
entirely different. It depends a bit on hardware.

Hardware such as pinctrl-single.c with one mux configuration
register per pin usually follow the Qualcomm way of doing
things, which is to simply have one group per pin, then that
can be associated with desired functions:
Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml
this has the upside of using all the standard bindings for
bias etc. Driver:
drivers/pinctrl/qcom/pinctrl-msm.c
then qualcomm have subdrivers for each SoC calling into this
so you have to check "real" bindings and drivers such as:
Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
drivers/pinctrl/qcom/pinctrl-sm8550.c

Yours,
Linus Walleij