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Message-ID: <ba0399d3-c3a5-0458-3668-e734fafe2f1a@linaro.org>
Date: Sat, 30 Sep 2023 18:39:33 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
andersson@...nel.org, agross@...nel.org, mturquette@...libre.com,
sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
jonathan@...ek.ca, quic_tdas@...cinc.com,
vladimir.zapolskiy@...aro.org
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/5] clk: qcom: camcc-sc8280xp: Add sc8280xp CAMCC
On 9/30/23 15:41, Bryan O'Donoghue wrote:
> Add the sc8280xp CAMCC driver which follows the sdm845 CAMCC lineage
> with additional CCI and IFE blocks and more granular clock parentage.
>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
> ---
[...]
> +static struct clk_branch camcc_gdsc_clk = {
> + .halt_reg = 0xc1e4,
> + .halt_check = BRANCH_HALT,
> + .clkr = {
> + .enable_reg = 0xc1e4,
> + .enable_mask = BIT(0),
> + .hw.init = &(struct clk_init_data){
> + .name = "camcc_gdsc_clk",
> + .parent_hws = (const struct clk_hw*[]){
> + &camcc_xo_clk_src.clkr.hw,
> + },
> + .num_parents = 1,
> + .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
"meh"
Is this clock only necessary for the GDSC to turn on?
I wanted to say "just chuck it into gdsc.cxcs", but upon actually
reading the code, I realized that just doing so doesn't event turn the
referenced clocks on.. That's.. a realization.. I think I'll be able to
solve a couple bugs with this knowledge..
[...]
> + ret = qcom_cc_really_probe(pdev, &camcc_sc8280xp_desc, regmap);
This conflicts with [1]
> + if (ret)
> + goto err_put_rpm;
[...]
> +
> +static int __init camcc_sc8280xp_init(void)
> +{
> + return platform_driver_register(&camcc_sc8280xp_driver);
> +}
> +subsys_initcall(camcc_sc8280xp_init);
module_platform_driver, please
Konrad
[1]
https://lore.kernel.org/linux-arm-msm/20230923112105.18102-4-quic_luoj@quicinc.com/
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