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Message-ID: <ZRsOTH//BZ74mU6P@brian-x1>
Date: Mon, 2 Oct 2023 14:39:08 -0400
From: Brian Masney <bmasney@...hat.com>
To: Nikunj Kela <quic_nkela@...cinc.com>
Cc: sudeep.holla@....com, cristian.marussi@....com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
andersson@...nel.org, konrad.dybcio@...aro.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v4 4/4] firmware: arm_scmi: Add qcom hvc/shmem transport
support
On Mon, Oct 02, 2023 at 02:34:06PM -0400, Brian Masney wrote:
> On Mon, Sep 11, 2023 at 12:43:59PM -0700, Nikunj Kela wrote:
> > + func_id = readl((void __iomem *)(scmi_info->shmem) + size - 16);
> > +#ifdef CONFIG_ARM64
> > + cap_id = readq((void __iomem *)(scmi_info->shmem) + size - 8);
> > +#else
> > + /* capability-id is 32 bit wide on 32bit machines */
> > + cap_id = readl((void __iomem *)(scmi_info->shmem) + size - 8);
> > +#endif
>
> The 32 bit case is defined as a u64 in two places above.
Also should the 32 bit case be 'size - 4' instead of 'size - 8'? Sorry
I just noticed that as soon as I pressed send.
Brian
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