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Date:   Mon, 2 Oct 2023 13:10:27 +0100
From:   Conor Dooley <conor@...nel.org>
To:     Chen Wang <unicorn_wang@...look.com>
Cc:     Jisheng Zhang <jszhang@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Anup Patel <anup@...infault.org>, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        Inochi Amaoto <inochiama@...look.com>, chao.wei@...hgo.com,
        xiaoguang.xing@...hgo.com
Subject: Re: [PATCH 0/5] Add Milk-V Duo board support

On Sat, Sep 30, 2023 at 10:18:23PM +0800, Chen Wang wrote:
> 
> 在 2023/9/30 20:39, Jisheng Zhang 写道:
> > Milk-V Duo[1] board is an embedded development platform based on the
> > CV1800B[2] chip. Add minimal device tree files for the development board.
> > Currently, now it's supported to boot to a basic shell.
> > 
> > NOTE: this series is based on the SG2042 upstream series for the vendor
> > prefix and ARCH_SOPHGO option.
> Missing reference to [3].

Should be fine without it :)

> > 
> > Link: https://milkv.io/duo [1]
> > Link: https://en.sophgo.com/product/introduce/cv180xB.html [2]
> > Link: https://lore.kernel.org/linux-riscv/cover.1695804418.git.unicornxw@gmail.com/ [3]
> > 
> > Jisheng Zhang (5):
> >    dt-bindings: interrupt-controller: Add SOPHGO CV1800B plic
> >    dt-bindings: timer: Add SOPHGO CV1800B clint
> >    dt-bindings: riscv: Add Milk-V Duo board compatibles
> >    riscv: dts: sophgo: add initial CV1800B SoC device tree
> >    riscv: dts: sophgo: add Milk-V Duo board device tree
> > 
> >   .../sifive,plic-1.0.0.yaml                    |   1 +
> >   .../devicetree/bindings/riscv/sophgo.yaml     |   4 +
> >   .../bindings/timer/sifive,clint.yaml          |   1 +
> >   arch/riscv/boot/dts/sophgo/Makefile           |   2 +-
> >   .../boot/dts/sophgo/cv1800b-milkv-duo.dts     |  38 ++++++
> >   arch/riscv/boot/dts/sophgo/cv1800b.dtsi       | 117 ++++++++++++++++++
> >   6 files changed, 162 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> >   create mode 100644 arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > 

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