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Message-Id: <20231003-topic-sm8550-rng-v4-5-255e4d0ba08e@linaro.org>
Date: Tue, 03 Oct 2023 09:10:23 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Vinod Koul <vkoul@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-crypto@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Neil Armstrong <neil.armstrong@...aro.org>
Subject: [PATCH v4 5/5] arm64: dts: qcom: sm8450: add TRNG node
The SM8450 SoC has a True Random Number Generator, add the node with
the correct compatible set.
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 1783fa78bdbc..bde9c1093384 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1739,6 +1739,11 @@ spi14: spi@...000 {
};
};
+ rng: rng@...3000 {
+ compatible = "qcom,sm8450-trng", "qcom,trng";
+ reg = <0 0x010c3000 0 0x1000>;
+ };
+
pcie0: pci@...0000 {
compatible = "qcom,pcie-sm8450-pcie0";
reg = <0 0x01c00000 0 0x3000>,
--
2.34.1
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