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Date:   Tue, 3 Oct 2023 11:57:58 +0300
From:   Andy Shevchenko <>
To:     Tam Nguyen <>
Subject: Re: [PATCH v1] i2c: designware: Disable TX_EMPTY irq while waiting
 for block length byte

On Fri, Sep 29, 2023 at 10:53:56AM +0700, Tam Nguyen wrote:
> During SMBus block data read process, we have seen high interrupt rate
> because of TX_EMPTY irq status while waiting for block length byte (the
> first data byte after the address phase). The interrupt handler does not
> do anything because the internal state is kept as STATUS_WRITE_IN_PROGRESS.
> Hence, we should disable TX_EMPTY irq until I2C DW receives first data


> byte from I2C device, then re-enable it.
> It takes 0.789 ms for host to receive data length from slave.
> Without the patch, i2c_dw_isr is called 99 times by TX_EMPTY interrupt.


> And it is none after applying the patch.

> Cc:
> Signed-off-by: Chuong Tran <>

Who is this guy? Do you need Co-developed-by tag?

> Signed-off-by: Tam Nguyen <>

Other than that, agree with Serge's points.

With Best Regards,
Andy Shevchenko

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