linux-kernel - Re: [EXT] Re: [PATCH v2] mtd: rawnand: Ensure the nand chip supports cached reads

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Message-ID: <20231003135601.6cf0d522@xps-13>
Date:   Tue, 3 Oct 2023 13:56:01 +0200
From:   Miquel Raynal <miquel.raynal@...tlin.com>
To:     Domenico Punzo <dpunzo@...ron.com>
Cc:     Martin Hundebøll <martin@...nix.com>,
        Rouven Czerwinski <r.czerwinski@...gutronix.de>,
        Måns Rullgård <mans@...sr.com>,
        Alexander Shiyan <eagle.alexander923@...il.com>,
        Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>,
        JaimeLiao <jaimeliao.tw@...il.com>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Sean Nyekjær <sean@...nix.com>,
        Bean Huo <beanhuo@...ron.com>
Subject: Re: [EXT] Re: [PATCH v2] mtd: rawnand: Ensure the nand chip
 supports cached reads

Hi Domenico,

dpunzo@...ron.com wrote on Tue, 3 Oct 2023 11:29:33 +0000:

> Micron Confidential
> 
> Hello Miquel,
> 
> Here is a short list of devices having cache read with ECC enabled.
> 
> MT29F2G08ABAGAH4, MT29F2G08ABBGAH4, MT29F2G16ABBGAH4
> MT29F1G08ABAFAH4, MT29F1G08ABBFAH4, MT29F1G16ABBFAH4

Great! Thanks a lot.

It appears that even without internal ECC enabled we get failures on
Micron parts, so I believe there is something else that we need to
investigate. But thanks for the list, I will propose a patch preventing
the use of on-die ECC together with sequential cache reads on all parts
but the ones in this list (can be extended later).

Thanks,
Miquèl