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Message-Id: <20231004235148.45562-1-aford173@gmail.com>
Date: Wed, 4 Oct 2023 18:51:47 -0500
From: Adam Ford <aford173@...il.com>
To: linux-arm-kernel@...ts.infradead.org
Cc: aford@...conembedded.com, Adam Ford <aford173@...il.com>,
Fabio Estevam <festevam@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
NXP Linux Team <linux-imx@....com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org
Subject: [PATCH V3] arm64: dts: imx8mp-beacon: Configure 100MHz PCIe Ref Clk
There is a I2C controlled 100MHz Reference clock used by the PCIe
controller. Configure this clock's DIF1 output to be used by
the PCIe.
Signed-off-by: Adam Ford <aford173@...il.com>
Reviewed-by: Fabio Estevam <festevam@...il.com>
---
V3: Update node names, clock-xtal25 and clock-generator per Shawn Guo
V2: Remove the pcie0_refclk clock that the new one replaces.
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
index ee64c6ffb551..0bea0798d2db 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
@@ -23,6 +23,12 @@ chosen {
stdout-path = &uart2;
};
+ clk_xtal25: clock-xtal25 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
connector {
compatible = "usb-c-connector";
label = "USB-C";
@@ -118,12 +124,6 @@ led-3 {
};
};
- pcie0_refclk: clock-pcie {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- };
-
reg_audio: regulator-wm8962 {
compatible = "regulator-fixed";
regulator-name = "3v3_aud";
@@ -273,6 +273,13 @@ pca6416_3: gpio@20 {
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ pcieclk: clock-generator@68 {
+ compatible = "renesas,9fgv0241";
+ reg = <0x68>;
+ clocks = <&clk_xtal25>;
+ #clock-cells = <1>;
+ };
};
&i2c3 {
@@ -408,8 +415,9 @@ &pcie {
};
&pcie_phy {
+ fsl,clkreq-unsupported;
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
- clocks = <&pcie0_refclk>;
+ clocks = <&pcieclk 1>;
clock-names = "ref";
status = "okay";
};
--
2.40.1
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