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Message-ID: <20231004-caregiver-deserve-71849c94dcfb@spud>
Date:   Wed, 4 Oct 2023 10:13:56 +0100
From:   Conor Dooley <conor@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Chen Wang <unicorn_wang@...look.com>,
        Jisheng Zhang <jszhang@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Anup Patel <anup@...infault.org>, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
        Inochi Amaoto <inochiama@...look.com>, chao.wei@...hgo.com,
        xiaoguang.xing@...hgo.com
Subject: Re: [PATCH 4/5] riscv: dts: sophgo: add initial CV1800B SoC device
 tree

On Wed, Oct 04, 2023 at 09:57:33AM +0200, Krzysztof Kozlowski wrote:
> On 04/10/2023 09:23, Chen Wang wrote:
> > 
> > 在 2023/9/30 20:39, Jisheng Zhang 写道:
> >> Add initial device tree for the CV1800B RISC-V SoC by SOPHGO.
> >>
> >> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> >> ---
> >>   arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 117 ++++++++++++++++++++++++
> >>   1 file changed, 117 insertions(+)
> >>   create mode 100644 arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > 
> > Hi, Jisheng, as far as I know, sg2042 and cv180x are now tracked by 
> > different people and even in sophgo, they are two independent 
> > projects(sg2042 is target for HPC and cv180x is target for embeded 
> > device). To facilitate future management and review, I recommend 
> > registering the maintainer information in two entries in MAINTAINERS. 
> > The example is as follows:
> > 
> > ```
> > 
> > SOPHGO CV180X DEVICETREES
> > M:  Jisheng Zhang <jszhang@...nel.org>
> > F:  arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> > F:  arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > 
> > SOPHGO SG2042 DEVICETREES
> > M:  Chao Wei <chao.wei@...hgo.com>
> > M:  Chen Wang <unicornxw@...il.com>
> > S:  Maintained
> > F:  arch/riscv/boot/dts/sophgo/Makefile
> > F:  arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
> > F:  arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> > F:  arch/riscv/boot/dts/sophgo/sg2042.dtsi
> > F:  Documentation/devicetree/bindings/riscv/sophgo.yaml
> > ```
> > 
> > For Makefile and sophgo.yaml such common files, just keep in sg2042 
> > entry should be fine.
> > 
> > @Conor, what do you think?
> 
> We do no have usually per-board maintainer entries (with few
> exceptions). I strongly prefer this one instead:
> 
> https://lore.kernel.org/all/829b122da52482707b783dc3d93d3ff0179cb0ca.camel@perches.com/

I don't like the suggestion here for a different reason! While I'm fine
with having some per-board SoC maintainers, esp. since the cv1800 stuff
is very different to the sg2042, I want to see someone step up to apply
the patches for the whole arch/riscv/boot/dts/sophgo/ directory once more
comfortable with the process, not reduce the entry to cover just the 64
core SoC.

Thanks,
Conor.

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