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Message-ID: <20231004103720.3540436-6-hugues.fruchet@foss.st.com>
Date: Wed, 4 Oct 2023 12:37:19 +0200
From: Hugues Fruchet <hugues.fruchet@...s.st.com>
To: Ezequiel Garcia <ezequiel@...guardiasur.com.ar>,
Philipp Zabel <p.zabel@...gutronix.de>,
Andrzej Pietrasiewicz <andrzej.p@...labora.com>,
Nicolas Dufresne <nicolas.dufresne@...labora.com>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Benjamin Gaignard <benjamin.gaignard@...labora.com>,
Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
Daniel Almeida <daniel.almeida@...labora.com>,
Benjamin Mugnier <benjamin.mugnier@...s.st.com>,
Heiko Stuebner <heiko@...ech.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Hans Verkuil <hverkuil@...all.nl>,
<linux-media@...r.kernel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
<linux-stm32@...md-mailman.stormreply.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-rockchip@...ts.infradead.org>
CC: Hugues Fruchet <hugues.fruchet@...s.st.com>,
Marco Felsch <m.felsch@...gutronix.de>,
Adam Ford <aford173@...il.com>
Subject: [RFC 5/6] media: hantro: h1: NV12 single-plane support
Add support of NV12 single-plane input frame.
Signed-off-by: Hugues Fruchet <hugues.fruchet@...s.st.com>
---
.../platform/verisilicon/hantro_h1_jpeg_enc.c | 42 +++++++++++--------
.../platform/verisilicon/hantro_h1_vp8_enc.c | 13 +++++-
2 files changed, 36 insertions(+), 19 deletions(-)
diff --git a/drivers/media/platform/verisilicon/hantro_h1_jpeg_enc.c b/drivers/media/platform/verisilicon/hantro_h1_jpeg_enc.c
index 12d69503d6ba..9cba30945421 100644
--- a/drivers/media/platform/verisilicon/hantro_h1_jpeg_enc.c
+++ b/drivers/media/platform/verisilicon/hantro_h1_jpeg_enc.c
@@ -42,9 +42,13 @@ static void hantro_h1_jpeg_enc_set_buffers(struct hantro_dev *vpu,
struct vb2_buffer *src_buf,
struct vb2_buffer *dst_buf)
{
+ const u32 src_addr_regs[] = { H1_REG_ADDR_IN_PLANE_0,
+ H1_REG_ADDR_IN_PLANE_1,
+ H1_REG_ADDR_IN_PLANE_2 };
struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt;
- dma_addr_t src[3];
+ size_t luma_size;
u32 size_left;
+ int i;
size_left = vb2_plane_size(dst_buf, 0) - ctx->vpu_dst_fmt->header_size;
if (WARN_ON(vb2_plane_size(dst_buf, 0) < ctx->vpu_dst_fmt->header_size))
@@ -57,23 +61,25 @@ static void hantro_h1_jpeg_enc_set_buffers(struct hantro_dev *vpu,
H1_REG_ADDR_OUTPUT_STREAM);
vepu_write_relaxed(vpu, size_left, H1_REG_STR_BUF_LIMIT);
- if (pix_fmt->num_planes == 1) {
- src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
- /* single plane formats we supported are all interlaced */
- vepu_write_relaxed(vpu, src[0], H1_REG_ADDR_IN_PLANE_0);
- } else if (pix_fmt->num_planes == 2) {
- src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
- src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1);
- vepu_write_relaxed(vpu, src[0], H1_REG_ADDR_IN_PLANE_0);
- vepu_write_relaxed(vpu, src[1], H1_REG_ADDR_IN_PLANE_1);
- } else {
- src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
- src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1);
- src[2] = vb2_dma_contig_plane_dma_addr(src_buf, 2);
- vepu_write_relaxed(vpu, src[0], H1_REG_ADDR_IN_PLANE_0);
- vepu_write_relaxed(vpu, src[1], H1_REG_ADDR_IN_PLANE_1);
- vepu_write_relaxed(vpu, src[2], H1_REG_ADDR_IN_PLANE_2);
- }
+ luma_size = hantro_rounded_luma_size(ctx->src_fmt.width,
+ ctx->src_fmt.height);
+
+ vepu_write_relaxed(vpu,
+ vb2_dma_contig_plane_dma_addr(src_buf, 0) +
+ src_buf->planes[0].data_offset,
+ src_addr_regs[0]);
+ vepu_write_relaxed(vpu,
+ vb2_dma_contig_plane_dma_addr(src_buf, 0) +
+ src_buf->planes[0].data_offset +
+ luma_size,
+ src_addr_regs[1]);
+
+ for (i = 1; i < pix_fmt->num_planes; ++i)
+ /* Multiplanes. */
+ vepu_write_relaxed(vpu,
+ vb2_dma_contig_plane_dma_addr(src_buf, i) +
+ src_buf->planes[i].data_offset,
+ src_addr_regs[i]);
}
static void
diff --git a/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c b/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c
index b7a635fb73b0..05aa0dd9c09c 100644
--- a/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c
+++ b/drivers/media/platform/verisilicon/hantro_h1_vp8_enc.c
@@ -1129,7 +1129,18 @@ hantro_h1_vp8_enc_set_buffers(struct hantro_dev *vpu, struct hantro_ctx *ctx, u3
H1_REG_ADDR_REC_CHROMA);
/* Source buffer. */
- for (i = 0; i < src_fmt->num_planes; ++i)
+ vepu_write_relaxed(vpu,
+ vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0) +
+ src_buf->vb2_buf.planes[0].data_offset,
+ src_addr_regs[0]);
+ vepu_write_relaxed(vpu,
+ vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0) +
+ src_buf->vb2_buf.planes[0].data_offset +
+ luma_size,
+ src_addr_regs[1]);
+
+ for (i = 1; i < src_fmt->num_planes; ++i)
+ /* Multiplanes. */
vepu_write_relaxed(vpu,
vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, i) +
src_buf->vb2_buf.planes[i].data_offset,
--
2.25.1
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