linux-kernel - Re: [PATCH v2 24/28] arm64: dts: renesas: rzg3l-smarc-som: add initial support for RZ/G3S SMARC SoM

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAMuHMdVcGxFCiw9dTkpMHzz2rBZ0Lc7RZrsKtYys=QksMYVgWg@mail.gmail.com>
Date:   Wed, 4 Oct 2023 15:30:44 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Claudiu <claudiu.beznea@...on.dev>
Cc:     mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
        linus.walleij@...aro.org, gregkh@...uxfoundation.org,
        jirislaby@...nel.org, magnus.damm@...il.com,
        catalin.marinas@....com, will@...nel.org,
        quic_bjorande@...cinc.com, konrad.dybcio@...aro.org, arnd@...db.de,
        neil.armstrong@...aro.org, prabhakar.mahadev-lad.rj@...renesas.com,
        biju.das.jz@...renesas.com, linux-renesas-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
        linux-serial@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 24/28] arm64: dts: renesas: rzg3l-smarc-som: add
 initial support for RZ/G3S SMARC SoM

On Fri, Sep 29, 2023 at 7:40 AM Claudiu <claudiu.beznea@...on.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> Add initial support for RZ/G3S SMARC SoM. The following devices available
> on SoM were added to this initial device tree:
>
> - RZ/G3S SoC: Renesas R9A08G045S33GBG
> - Clock Generator (only 24MHz output): Renesas 5L35023B
> - 1GiB LPDDR4 SDRAM: Micron MT53D512M16D1DS-046
> - 64GB eMMC Flash (though SD ch0): Micron MTFC64GBCAQTC
>
> SD channel 0 of RZ/G3S is connected to an uSD card interface
> and an eMMC. The selection b/w them is done though a hardware switch.
> The DT will select b/w uSD and eMMC though SW_SD0_DEV_SEL build flag.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> ---
>
> Changes in v2:
> - s/Carrier-II SoM/SoM in patch title
> - listed in commit description only devices addressed by this initial dtsi
> - s/8G LPDDR4/1GiB LPDDR4 in commit description
> - removed sd0-pwr-en-hog node and use specific GPIO in vcc_sdhi0 regulator
> - added SoM compatible:
>   compatible = "renesas,rzg3s-smarcm", "renesas,r9a08g045s33", "renesas,r9a08g045";

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-devel for v6.7.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds