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Message-ID: <MA0P287MB0332EDF53C7B61C3ECDF8F39FECBA@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM>
Date: Wed, 4 Oct 2023 22:27:09 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: aou@...s.berkeley.edu, chao.wei@...hgo.com, conor@...nel.org,
devicetree@...r.kernel.org, guoren@...nel.org, jszhang@...nel.org,
krzysztof.kozlowski+dt@...aro.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, palmer@...belt.com,
paul.walmsley@...ive.com, robh+dt@...nel.org,
xiaoguang.xing@...hgo.com, apatel@...tanamicro.com
Cc: Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v4 01/10] riscv: Add SOPHGO SOC family Kconfig support
Sorry, please ignore this email due to not sending out in thread.
On 2023/10/4 22:20, Chen Wang wrote:
> The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
> cores.
>
> Reviewed-by: Guo Ren <guoren@...nel.org>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> Acked-by: Chao Wei <chao.wei@...hgo.com>
> Signed-off-by: Chen Wang <unicorn_wang@...look.com>
> ---
> arch/riscv/Kconfig.socs | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 6833d01e2e70..d4df7b5d0f16 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -22,6 +22,11 @@ config SOC_SIFIVE
> help
> This enables support for SiFive SoC platform hardware.
>
> +config ARCH_SOPHGO
> + bool "Sophgo SoCs"
> + help
> + This enables support for Sophgo SoC platform hardware.
> +
> config ARCH_STARFIVE
> def_bool SOC_STARFIVE
>
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