[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20231005195137.3117166-1-jithu.joseph@intel.com>
Date: Thu, 5 Oct 2023 12:51:28 -0700
From: Jithu Joseph <jithu.joseph@...el.com>
To: ilpo.jarvinen@...ux.intel.com, hdegoede@...hat.com,
markgross@...nel.org
Cc: tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
rostedt@...dmis.org, jithu.joseph@...el.com, ashok.raj@...el.com,
tony.luck@...el.com, linux-kernel@...r.kernel.org,
platform-driver-x86@...r.kernel.org, patches@...ts.linux.dev,
ravi.v.shankar@...el.com, pengfei.xu@...el.com
Subject: [PATCH v4 0/9] IFS support for GNR and SRF
Changes in v4
Ilpo Järvinen
- Changed the dev_err/warn printk format specifiers to more
appropriate ones (patch 5, 6)
- Add defines for array generation (patch 9)
v3 submission
Link: https://lore.kernel.org/lkml/20230929202436.2850388-1-jithu.joseph@intel.com/
Changes in v3
Ilpo Järvinen
- Added Reviewed-by tags wherever provided
- In function validate_ifs_metadata() (patch 6)
- Add != 0 to next line for clarity
- In function ifs_load_firmware() (patch 5)
- return -EINVAL instead of -BADFD
- In function ifs_test_core() (patch 4)
- initialize activate.gen0.rsvd = 0
- use if instead of conditional operator
- alignment change in ifs_scan_hashes_status_gen2 (patch 3)
v2 submission
Link: https://lore.kernel.org/lkml/20230922232606.1928026-1-jithu.joseph@intel.com/
Changes in v2
Ilpo Järvinen
- Use GENMASK_ULL() / FIELD_GET() for bitops (patch 01)
- Avoid mixing u8 type and bitfields in certain MSR structure
scenarios (patch03 also suggested by Dave Hansen)
- Expand bitfield structures to use consistent genx naming (patch 04)
- Replace goto with do / while (patch 03)
- general formatting (multiple patches)
- remove un-necessary parenthesis
- reformat commit message to use whole allowed 72 columns
- alignment changes
Other change
- fold v1 04/10 and 05/10 into v2 patch 04/09 to satisfy build
constraints due to consistent genx naming
v1 submission:
Link: https://lore.kernel.org/lkml/20230913183348.1349409-1-jithu.joseph@intel.com/
This series adds In Field Scan(IFS) support for newer CPUs like Granite
Rapids(GNR) and Sierra Forest(SRF).
There are changes in the IFS image loading and test flow to support
these new CPUs.
Note to reviewers:
- patch 1/9 adds a bit mask to arch/x86/.../msr-index.h,
hence x86 maintainers are cc-d.
- patch 4/9 modifies an existing tracepoint, cc Steven Rostedt
- Rest are localized to IFS driver
Jithu Joseph (9):
platform/x86/intel/ifs: Store IFS generation number
platform/x86/intel/ifs: Refactor image loading code
platform/x86/intel/ifs: Gen2 scan image loading
platform/x86/intel/ifs: Gen2 Scan test support
platform/x86/intel/ifs: Validate image size
platform/x86/intel/ifs: Metadata validation for start_chunk
platform/x86/intel/ifs: Add new CPU support
platform/x86/intel/ifs: Add new error code
platform/x86/intel/ifs: ARRAY BIST for Sierra Forest
arch/x86/include/asm/msr-index.h | 1 +
drivers/platform/x86/intel/ifs/ifs.h | 64 ++++++++-
include/trace/events/intel_ifs.h | 16 +--
drivers/platform/x86/intel/ifs/core.c | 15 ++-
drivers/platform/x86/intel/ifs/load.c | 158 +++++++++++++++++++++--
drivers/platform/x86/intel/ifs/runtest.c | 72 +++++++++--
6 files changed, 286 insertions(+), 40 deletions(-)
base-commit: 8a749fd1a8720d4619c91c8b6e7528c0a355c0aa
--
2.25.1
Powered by blists - more mailing lists